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updated gitignore and regression make to ignore gf180. Fixed issue with rom decoder routing

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This commit is contained in:
SWalker
2023-10-31 23:24:21 -07:00
parent bd9ebc3300
commit 5378a308c1
4 changed files with 18 additions and 5 deletions
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compiler/modules/rom_address_control_buf.py
+3 -3
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@@ -119,12 +119,12 @@ class rom_address_control_buf(design):
ppoly_center = poly_right - 0.7 * self.poly_width
poly_y = A_out.cy()
# Placement of gate contacts for NAND cell are different in gf180 which requires tech-specific placement.
if OPTS.tech_name == "gf180mcu":
poly_y = vdd_rail.cy() + 0.5 * drc("minwidth_tx") * 3 + self.poly_extend_active
ppoly_center = A_out.cx() + 0.5 * self.interconnect_width + 0.5 * self.poly_width
else:
ppoly_center = poly_right - 0.7 * self.poly_width
poly_y = A_out.cy()
contact_offset = vector(ppoly_center, clk2_pin.cy())
compiler/modules/rom_decoder.py
+10 -1
View File
@@ -18,7 +18,7 @@ class rom_decoder(design):
# array gets rotated 90deg so rows/cols switch
if "li" in layer:
self.output_layer = "m1"
self.inv_route_layer = "m2"
self.inv_route_layer = "m1"
else:
self.output_layer = "m1"
self.inv_route_layer = "m3"
@@ -239,6 +239,15 @@ class rom_decoder(design):
self.add_via_stack_center(offset=addr_bar_pin.center(),
from_layer=addr_bar_pin.layer,
to_layer=self.inv_route_layer)
self.add_via_stack_center(offset=addr_out_pin.center(),
from_layer=addr_out_pin.layer,
to_layer=self.inv_route_layer)
self.add_via_stack_center(offset=addr_bar_out_pin.center(),
from_layer=addr_bar_out_pin.layer,
to_layer=self.inv_route_layer)
self.copy_layout_pin(self.buf_inst, "A{}_in".format(i), "A{}".format(i))
def route_supplies(self):