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Fix a couple supply routing issues.
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@@ -147,13 +147,14 @@ class column_mux_array(design.design):
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offset=offset,
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height=self.height - offset.y)
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for inst in self.mux_inst:
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self.copy_layout_pin(inst, "gnd")
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def route_supplies(self):
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self.route_horizontal_pins("gnd", self.insts)
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def add_routing(self):
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self.add_horizontal_input_rail()
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self.add_vertical_poly_rail()
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self.route_bitlines()
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self.route_supplies()
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def add_horizontal_input_rail(self):
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""" Create address input rails below the mux transistors """
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