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https://github.com/VLSIDA/OpenRAM.git
synced 2026-09-03 08:27:11 +02:00
Fix a couple supply routing issues.
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@@ -657,12 +657,13 @@ class layout():
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via_width=None
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via_height=0
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bot_y = min([pin.by() for (inst,pin) in v])
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top_y = max([pin.uy() for (inst,pin) in v])
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if full_width:
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bot_y = 0
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top_y = self.height
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else:
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bot_y = min([pin.by() for (inst,pin) in v])
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top_y = max([pin.uy() for (inst,pin) in v])
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bot_y = min(0, bot_y)
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top_y = max(self.height, top_y)
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top_pos = vector(x, top_y + 0.5 * via_height)
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bot_pos = vector(x, bot_y - 0.5 * via_height)
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@@ -758,12 +759,13 @@ class layout():
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via_height=None
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via_width=0
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left_x = min([pin.lx() for (inst,pin) in v])
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right_x = max([pin.rx() for (inst,pin) in v])
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if full_width:
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left_x = 0
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right_x = self.width
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else:
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left_x = min([pin.lx() for (inst,pin) in v])
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right_x = max([pin.rx() for (inst,pin) in v])
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left_x = min(0, left_x)
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right_x = max(self.width, right_x)
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left_pos = vector(left_x + 0.5 * via_width, y)
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right_pos = vector(right_x + 0.5 * via_width, y)
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