lvs failures

compiler/modules/bitcell_base_array.py

@@ -185,33 +185,6 @@ class bitcell_base_array(design):
             dir_x = True
         return (tempy, dir_x)
 
-    # def place_array(self, name_template: str, row_offset=0):
-    #     # We increase it by a well enclosure so the precharges don't overlap our wells
-    #     self.height = self.row_size * self.cell.height
-    #     self.width = self.column_size * self.cell.width
-    #
-    #     xoffset = 0.0
-    #     for col in range(self.column_size):
-    #         yoffset = 0.0
-    #         tempx, dir_y = self._adjust_x_offset(xoffset, col, self.column_offset)
-    #
-    #         for row in range(self.row_size):
-    #             tempy, dir_x = self._adjust_y_offset(yoffset, row, row_offset)
-    #
-    #             if dir_x and dir_y:
-    #                 dir_key = "XY"
-    #             elif dir_x:
-    #                 dir_key = "MX"
-    #             elif dir_y:
-    #                 dir_key = "MY"
-    #             else:
-    #                 dir_key = ""
-    #
-    #             self.cell_inst[row, col].place(offset=[tempx, tempy],
-    #                                            mirror=dir_key)
-    #             yoffset += self.cell.height
-    #         xoffset += self.cell.width
-
     def place_array(self):
         self.pattern.place_array()