Replica bitcell array working

This commit is contained in:
mrg
2019-06-19 16:03:21 -07:00
parent 5c4df2410e
commit 4523a7b9f6
18 changed files with 931 additions and 477 deletions
+19 -3
View File
@@ -214,7 +214,13 @@ class layout():
return self.pin_map[text]
else:
return set()
def get_pin_names(self):
"""
Return a pin list of all pins
"""
return self.pin_map.keys()
def copy_layout_pin(self, instance, pin_name, new_name=""):
"""
Create a copied version of the layout pin at the current level.
@@ -226,6 +232,16 @@ class layout():
new_name = pin.name
self.add_layout_pin(new_name, pin.layer, pin.ll(), pin.width(), pin.height())
def copy_layout_pins(self, instance, prefix=""):
"""
Create a copied version of the layout pin at the current level.
You can optionally rename the pin to a new name.
"""
for pin_name in self.pin_map.keys():
pins=instance.get_pins(pin_name)
for pin in pins:
self.add_layout_pin(prefix+pin_name, pin.layer, pin.ll(), pin.width(), pin.height())
def add_layout_pin_segment_center(self, text, layer, start, end):
"""
Creates a path like pin with center-line convention
@@ -880,10 +896,10 @@ class layout():
"""
self.create_channel_route(netlist, offset, layer_stack, pitch, vertical=False)
def add_boundary(self):
def add_boundary(self, offset=vector(0,0)):
""" Add boundary for debugging dimensions """
self.add_rect(layer="boundary",
offset=vector(0,0),
offset=offset,
height=self.height,
width=self.width)
+4
View File
@@ -102,6 +102,10 @@ class spice():
output_list.append(pin)
return output_list
def copy_pins(self, other_module, suffix=""):
""" This will copy all of the pins from the other module and add an optional suffix."""
for pin in other_module.pins:
self.add_pin(pin+suffix, other_module.get_pin_type(pin))
def add_mod(self, mod):
"""Adds a subckt/submodule to the subckt hierarchy"""