mirror of https://github.com/VLSIDA/OpenRAM.git
update gds library, generalize geometry reverse transform function
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@ -256,9 +256,9 @@ class instance(geometry):
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new_pins.append(p)
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return new_pins
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def reverse_bitcell_transformation(self):
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def reverse_transformation(self, cell_name):
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path = []
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bitcell_paths = []
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cell_paths = []
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pex_offsets = []
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Q_offsets = []
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Q_bar_offsets = []
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@ -266,8 +266,9 @@ class instance(geometry):
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def walk_subtree(node):
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path.append(node)
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if node.mod.name == 'pbitcell':
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bitcell_paths.append(copy.copy(path))
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if node.mod.name == cell_name:
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print("bitcell found")
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cell_paths.append(copy.copy(path))
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Q_x = node.mod.get_normalized_storage_net_offset()[0][0]
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Q_y = node.mod.get_normalized_storage_net_offset()[0][1]
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@ -338,7 +339,7 @@ class instance(geometry):
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return (uVector, vVector, origin)
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walk_subtree(self)
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for path in bitcell_paths:
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for path in cell_paths:
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vector_spaces = apply_path_transform(path)
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origin = vector_spaces[2]
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pex_offsets.append([origin[0], origin[1]])
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@ -10,7 +10,7 @@ import debug
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import design
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from globals import OPTS
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import logical_effort
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from tech import parameter, drc
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from tech import parameter, drc, layer
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class bitcell_base(design.design):
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@ -85,14 +85,15 @@ class bitcell_base(design.design):
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Gets the location of the storage net labels to add top level
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labels for pex simulation.
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"""
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#TODO: use getTexts to support custom bitcells
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# If we generated the bitcell, we already know where Q and Q_bar are
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#if OPTS.bitcell is not "pbitcell":
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# self.storage_net_offsets = []
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# for net in get_storage_net_names:
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# if net is "Q" or "Q_bar":
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# for text in self.getTexts("metal1"):
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# self.storage_net_offsets.append(text.offsetInMicrons)
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if OPTS.bitcell is not "pbitcell":
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self.storage_net_offsets = []
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for i in range(0, len(self.get_storage_net_names())):
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for text in self.gds.getTexts(layer["metal1"]):
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if self.storage_nets[i] == text:
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print(text)
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return(self.storage_net_offsets)
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def get_normalized_storage_net_offset(self):
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@ -101,11 +102,11 @@ class bitcell_base(design.design):
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of the bitcell. This is useful for making sense of offsets outside
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of the bitcell.
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"""
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Q_x = self.storage_net_offsets[0][0] - self.leftmost_xpos
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Q_y = self.storage_net_offsets[0][1] - self.botmost_ypos
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Q_bar_x = self.storage_net_offsets[1][0] - self.leftmost_xpos
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Q_bar_y = self.storage_net_offsets[1][1] - self.botmost_ypos
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print("get normalized")
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Q_x = self.get_storage_net_offset()[0][0] - self.leftmost_xpos
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Q_y = self.get_storage_net_offset()[0][1] - self.botmost_ypos
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Q_bar_x = self.get_storage_net_offset()[1][0] - self.leftmost_xpos
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Q_bar_y = self.get_storage_net_offset()[1][1] - self.botmost_ypos
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normalized_storage_net_offset = [[Q_x,Q_y],[Q_bar_x,Q_bar_y]]
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@ -94,21 +94,21 @@ class sram_base(design, verilog, lef):
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# add pex labels for bitcell
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for bank_num in range(0,len(self.bank_insts)):
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bank = self.bank_insts[bank_num]
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pex_offsets = bank.reverse_bitcell_transformation()
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pex_offsets = bank.reverse_transformation(bank.mod.bitcell.name)
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bank_offset = pex_offsets[0] # offset bank relative to sram
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Q_offset = pex_offsets[1] # offset of storage relative to bank
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Q_bar_offset = pex_offsets[2] # offset of storage relative to bank
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layer = "metal1"
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layer_name = "metal1"
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for i in range(0,len(bank_offset)):
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Q = [bank_offset[i][0] + Q_offset[i][0], bank_offset[i][1] + Q_offset[i][1]]
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Q_bar = [bank_offset[i][0] + Q_bar_offset[i][0], bank_offset[i][1] + Q_bar_offset[i][1]]
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self.add_layout_pin_rect_center("bitcell_Q_b{0}_r{1}_c{2}".format(bank_num, i % OPTS.num_words, int(i / OPTS.num_words)) , layer, Q)
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self.add_layout_pin_rect_center("bitcell_Q_bar_b{0}_r{1}_c{2}".format(bank_num, i % OPTS.num_words, int(i / OPTS.num_words)), layer, Q_bar)
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self.add_layout_pin_rect_center("bitcell_Q_b{0}_r{1}_c{2}".format(bank_num, i % OPTS.num_words, int(i / OPTS.num_words)) , layer_name, Q)
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self.add_layout_pin_rect_center("bitcell_Q_bar_b{0}_r{1}_c{2}".format(bank_num, i % OPTS.num_words, int(i / OPTS.num_words)), layer_name, Q_bar)
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# add pex labels for control logic
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for i in range (0,len(self.control_logic_insts)):
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@ -1,6 +1,6 @@
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magic
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tech scmos
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timestamp 1577066121
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timestamp 1577163318
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<< nwell >>
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rect -8 35 42 57
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<< pwell >>
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