luke
/
OpenRAM
mirror of https://github.com/VLSIDA/OpenRAM.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Fail unit test, but mention if LVS passes and DRC fails.

This commit is contained in:
mrg 2020-06-30 16:22:44 -07:00
parent 0a87691176
commit 3379f46da1
1 changed files with 1 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
compiler/tests/testutils.py
View File

@ -57,8 +57,7 @@ class openram_test(unittest.TestCase):
# zip_file = "/tmp/{0}_{1}".format(a.name, os.getpid()) # zip_file = "/tmp/{0}_{1}".format(a.name, os.getpid())
# debug.info(0, "Archiving failed files to {}.zip".format(zip_file)) # debug.info(0, "Archiving failed files to {}.zip".format(zip_file))
# shutil.make_archive(zip_file, 'zip', OPTS.openram_temp) # shutil.make_archive(zip_file, 'zip', OPTS.openram_temp)
debug.warning("DRC failed but LVS passed: {}".format(a.name)) self.fail("DRC failed but LVS passed: {}".format(a.name))
# self.fail("DRC failed but LVS passed: {}".format(a.name))
elif drc_result != 0: elif drc_result != 0:
# import shutil # import shutil
# zip_file = "/tmp/{0}_{1}".format(a.name, os.getpid()) # zip_file = "/tmp/{0}_{1}".format(a.name, os.getpid())