mirror of https://github.com/VLSIDA/OpenRAM.git
Run Calibre LVS even if DRC fails.
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@ -48,12 +48,11 @@ class openram_test(unittest.TestCase):
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# if we ignore things like minimum metal area of pins
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drc_result=verify.run_drc(a.name, tempgds, extract=True, final_verification=final_verification)
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# Always run LVS if we are using magic
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if "magic" in OPTS.drc_exe or drc_result == 0:
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lvs_result=verify.run_lvs(a.name, tempgds, tempspice, final_verification=final_verification)
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# We can still run LVS even if DRC fails in Magic OR Calibre
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lvs_result=verify.run_lvs(a.name, tempgds, tempspice, final_verification=final_verification)
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# Only allow DRC to fail and LVS to pass if we are using magic
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if "magic" in OPTS.drc_exe and lvs_result == 0 and drc_result != 0:
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if lvs_result == 0 and drc_result != 0:
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# import shutil
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# zip_file = "/tmp/{0}_{1}".format(a.name, os.getpid())
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# debug.info(0, "Archiving failed files to {}.zip".format(zip_file))
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