luke/OpenRAM
1
0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-09-03 16:31:08 +02:00
Code Issues Packages Projects Releases Wiki Activity

Sized inverter for number of driven write drivers.

Browse Source
This commit is contained in:
jsowash
2019-08-19 13:31:49 -07:00
parent c19bada8df
commit 316132a33c
1 changed files with 3 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
compiler/modules/write_mask_and_array.py
+3 -1
View File
@@ -64,7 +64,9 @@ class write_mask_and_array(design.design):
self.add_pin("gnd","GROUND")
def add_modules(self):
self.and2 = factory.create(module_type="pand2")
# Size the AND gate for the number of write drivers it drives, which is equal to the write size.
self.and2 = factory.create(module_type="pand2",
size=self.write_size)
self.add_mod(self.and2)