From 316132a33c31b262391edae81f20be769307f394 Mon Sep 17 00:00:00 2001 From: jsowash Date: Mon, 19 Aug 2019 13:31:49 -0700 Subject: [PATCH] Sized inverter for number of driven write drivers. --- compiler/modules/write_mask_and_array.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/compiler/modules/write_mask_and_array.py b/compiler/modules/write_mask_and_array.py index 785534be..5fcc39a0 100644 --- a/compiler/modules/write_mask_and_array.py +++ b/compiler/modules/write_mask_and_array.py @@ -64,7 +64,9 @@ class write_mask_and_array(design.design): self.add_pin("gnd","GROUND") def add_modules(self): - self.and2 = factory.create(module_type="pand2") + # Size the AND gate for the number of write drivers it drives, which is equal to the write size. + self.and2 = factory.create(module_type="pand2", + size=self.write_size) self.add_mod(self.and2)