luke
/
OpenRAM
mirror of https://github.com/VLSIDA/OpenRAM.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Fix the total addr_size

This commit is contained in:
Bugra Onal 2022-08-04 16:36:26 -07:00
parent 0ca14a3662
commit 2ed107f9ff
1 changed files with 4 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
compiler/modules/sram_config.py
View File

@ -121,12 +121,14 @@ class sram_config:
self.row_addr_size = ceil(log(self.num_rows, 2)) self.row_addr_size = ceil(log(self.num_rows, 2))
self.col_addr_size = int(log(self.words_per_row, 2)) self.col_addr_size = int(log(self.words_per_row, 2))
self.bank_addr_size = self.col_addr_size + self.row_addr_size self.bank_addr_size = self.col_addr_size + self.row_addr_size
#self.addr_size = self.bank_addr_size + int(log(self.num_banks, 2)) self.addr_size = self.bank_addr_size + int(log(self.num_banks, 2))
self.addr_size = self.bank_addr_size #self.addr_size = self.bank_addr_size
debug.info(1, "Row addr size: {}".format(self.row_addr_size) debug.info(1, "Row addr size: {}".format(self.row_addr_size)
+ " Col addr size: {}".format(self.col_addr_size) + " Col addr size: {}".format(self.col_addr_size)
+ " Bank addr size: {}".format(self.bank_addr_size)) + " Bank addr size: {}".format(self.bank_addr_size))
num_ports = OPTS.num_rw_ports + OPTS.num_r_ports + OPTS.num_w_ports num_ports = OPTS.num_rw_ports + OPTS.num_r_ports + OPTS.num_w_ports
if num_ports == 1: if num_ports == 1:
if ((self.num_cols + num_ports + self.num_spare_cols) % self.array_col_multiple != 0): if ((self.num_cols + num_ports + self.num_spare_cols) % self.array_col_multiple != 0):