mirror of https://github.com/VLSIDA/OpenRAM.git
Fix input height error for input rail pins
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@ -122,7 +122,7 @@ class hierarchical_decoder(design.design):
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# input bus width plus a spacing track
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input_width = (self.num_inputs+1) * self.m2_pitch
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# inputs should be as high as the decoders
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input_height = self.no_of_pre2x4*self.pre2_4.height + self.no_of_pre2x4*self.pre3_8.height
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input_height = self.no_of_pre2x4*self.pre2_4.height + self.no_of_pre3x8*self.pre3_8.height
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# Find the left-most predecoder
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min_x = 0
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@ -137,6 +137,7 @@ class hierarchical_decoder(design.design):
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self.add_layout_pin(text="A[{0}]".format(i),
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layer="metal2",
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offset=vector(x_offset,0),
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width=self.m2_width,
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height=input_height)
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self.connect_input_to_predecodes()
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