Add unblocking of source and destination pins to router.

This commit is contained in:
mrg 2022-03-18 14:44:13 -07:00
parent 01a73b31e1
commit 2bfc94fcdd
4 changed files with 15 additions and 9 deletions

View File

@ -20,8 +20,7 @@ class grid_cell:
def reset(self):
"""
Reset the dynamic info about routing. The pins/blockages are not reset so
that they can be reused.
Reset the dynamic info about routing.
"""
self.min_cost=-1
self.min_path=None

View File

@ -375,9 +375,10 @@ class router(router_tech):
# This is just a virtual function
pass
def prepare_blockages(self):
def prepare_blockages(self, src=None, dest=None):
"""
Reset and add all of the blockages in the design.
Skip adding blockages from src and dest component if specified as a tuple of name,component.
"""
debug.info(3, "Preparing blockages.")
@ -400,8 +401,14 @@ class router(router_tech):
# Now go and block all of the blockages due to pin shapes.
# Some of these will get unblocked later if they are the source/target.
for name in self.pin_groups:
# This should be a superset of the grids...
blockage_grids = {y for x in self.pin_groups[name] for y in x.blockages}
blockage_grids = []
for component_idx, component in enumerate(self.pin_groups[name]):
# Skip adding source or dest blockages
if src and src[0] == name and src[1] == component_idx:
continue
if dest and dest[0] == name and dest[1] == component_idx:
continue
blockage_grids.extend(component.blockages)
self.set_blockages(blockage_grids, True)
# If we have paths that were recently routed, add them as blockages as well.

View File

@ -59,7 +59,7 @@ class signal_router(router):
self.write_debug_gds(stop_program=False)
return False
self.write_debug_gds(stop_program=False)
#self.write_debug_gds(stop_program=False)
return True

View File

@ -171,7 +171,7 @@ class supply_tree_router(router):
# This is inefficient since it is non-incremental, but it was
# easier to debug.
self.prepare_blockages()
self.prepare_blockages(src=(pin_name, src_idx), dest=(pin_name, dest_idx))
if unblock_routes:
msg = "Unblocking supply self blockages to improve access (may cause DRC errors):\n{0}\n{1})"
debug.warning(msg.format(pin_name,
@ -189,8 +189,8 @@ class supply_tree_router(router):
# Actually run the A* router
if self.run_router(detour_scale=detour_scale):
return
if detour_scale > 2:
self.write_debug_gds("route_{0}_{1}_d{2}.gds".format(src_idx, dest_idx, detour_scale), False)
#if detour_scale > 2:
# self.write_debug_gds("route_{0}_{1}_d{2}.gds".format(src_idx, dest_idx, detour_scale), False)
self.write_debug_gds("debug_route.gds", True)