Reversed order of wmask bits in functional.py since python lists go left to right. Made # of en bits equal to num_masks.

compiler/characterizer/functional.py

@@ -152,14 +152,6 @@ class functional(simulation):
                             lower = bit * self.write_size
                             upper = lower + self.write_size - 1
                             new_word = new_word[:lower] + old_word[lower:upper+1] + new_word[upper + 1:]
-                            # if bit == self.num_wmask - 1:
-                            #     new_word = new_word[0:lower] + old_word[lower:upper+1]
-                            # elif bit == 0:
-                            #     new_word = old_word[lower:upper + 1] + new_word[upper + 1:self.word_size]
-                            # else:
-                            #     new_word = new_word[0:lower] + old_word[lower:upper+1] + new_word[upper+1:self.word_size]
-
-                            #wmask = wmask[:index] + "1" + wmask[index + 1:]
 
                     # two ports cannot write to the same address
                     if addr in w_addrs:
@@ -221,15 +213,12 @@ class functional(simulation):
         return(1, "SUCCESS")
 
     def gen_wmask(self):
-        # wmask_bits = [None]*self.num_wmasks
-        # for bit in range(self.num_wmasks):
-        #     rand = random.randint(0,1)
-        #     wmask_bits[bit] = rand
         wmask = ""
+        # generate a random wmask
         for bit in range(self.num_wmasks):
             rand = random.randint(0, 1)
             wmask += str(rand)
-        # prevent the wmask from having all bits on
+        # prevent the wmask from having all bits on or off (not partial write)
         all_zeroes = True
         all_ones = True
         for bit in range(self.num_wmasks):
@@ -243,10 +232,8 @@ class functional(simulation):
         elif all_ones:
             index = random.randint(0, self.num_wmasks - 1)
             wmask = wmask[:index] + "0" + wmask[index + 1:]
-        return wmask
+        # wmask must be reversed since a python list goes right to left and sram bits go left to right.
-
+        return wmask[::-1]
-
-        # prevent the wmask from having all bits off
 
 
     def gen_data(self):

compiler/characterizer/simulation.py

@@ -271,7 +271,7 @@ class simulation():
                                                                                                                t_current,
                                                                                                                t_current+self.period)
         elif op == "partial_write":
-            comment = "\tWriting {0}  to  address {1} with mask bit {2} (from port {3}) during cycle {4} ({5}ns - {6}ns)".format(word,
+            comment = "\tWriting (partial) {0}  to  address {1} with mask bit {2} (from port {3}) during cycle {4} ({5}ns - {6}ns)".format(word,
                                                                                                             addr,
                                                                                                             wmask,
                                                                                                             port,

compiler/modules/port_data.py

@@ -300,11 +300,8 @@ class port_data(design.design):
                 temp.append(self.br_names[self.port]+"_out_{0}".format(bit))
 
         if self.write_size is not None:
-            i = 0
+            for i in range(self.num_wmasks):
-            for bit in range(0,self.word_size,self.write_size):
-                for x in range(self.write_size):
                 temp.append("wdriver_sel_{}".format(i))
-                i+=1
         else:
             temp.append("w_en")
         temp.extend(["vdd", "gnd"])

compiler/modules/write_driver_array.py

@@ -30,6 +30,9 @@ class write_driver_array(design.design):
         self.write_size = write_size
         self.words_per_row = int(columns / word_size)
 
+        if self.write_size is not None:
+            self.num_wmasks = int(self.word_size/self.write_size)
+
         self.create_netlist()
         if not OPTS.netlist_only:
             self.create_layout()
@@ -61,7 +64,7 @@ class write_driver_array(design.design):
             self.add_pin("bl_{0}".format(i))
             self.add_pin("br_{0}".format(i))
         if self.write_size != None:
-            for i in range(self.word_size):
+            for i in range(self.num_wmasks):
                 self.add_pin("en_{}".format(i))
         else:
             self.add_pin("en")
@@ -78,17 +81,23 @@ class write_driver_array(design.design):
 
     def create_write_array(self):
         self.driver_insts = {}
+        w = 0
+        windex=0
         for i in range(0,self.columns,self.words_per_row):
             name = "write_driver{}".format(i)
             index = int(i/self.words_per_row)
             self.driver_insts[index]=self.add_inst(name=name,
                                                    mod=self.driver)
 
-            if self.write_size != None:
+            if self.write_size is not None:
                 self.connect_inst(["data_{0}".format(index),
                                    "bl_{0}".format(index),
                                    "br_{0}".format(index),
-                                   "en_{0}".format(index), "vdd", "gnd"])
+                                   "en_{0}".format(windex), "vdd", "gnd"])
+                w+=1
+                if w == self.write_size:
+                    w = 0
+                    windex+=1
             else:
                 self.connect_inst(["data_{0}".format(index),
                                    "bl_{0}".format(index),