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Flatten bitcell array in netgen for now. See issue 52

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Matt Guthaus
2018-10-19 09:13:17 -07:00
parent 74b806fa38
commit 233a1425e4
1 changed files with 1 additions and 0 deletions
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compiler/verify/magic.py
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@@ -99,6 +99,7 @@ def write_netgen_script(cell_name, sp_name):
f.write("equate class {{pfet {0}.spice}} {{p {1}}}\n".format(cell_name, sp_name)) f.write("equate class {{pfet {0}.spice}} {{p {1}}}\n".format(cell_name, sp_name))
# This circuit has symmetries and needs to be flattened to resolve them or the banks won't pass # This circuit has symmetries and needs to be flattened to resolve them or the banks won't pass
# Is there a more elegant way to add this when needed? # Is there a more elegant way to add this when needed?
f.write("flatten class {{{0}.spice bitcell_array}}\n".format(cell_name))
f.write("flatten class {{{0}.spice precharge_array_1}}\n".format(cell_name)) f.write("flatten class {{{0}.spice precharge_array_1}}\n".format(cell_name))
f.write("flatten class {{{0}.spice precharge_array_2}}\n".format(cell_name)) f.write("flatten class {{{0}.spice precharge_array_2}}\n".format(cell_name))
f.write("flatten class {{{0}.spice precharge_array_3}}\n".format(cell_name)) f.write("flatten class {{{0}.spice precharge_array_3}}\n".format(cell_name))