From 233a1425e4baf6111b5fbea16363ea0927b360af Mon Sep 17 00:00:00 2001 From: Matt Guthaus Date: Fri, 19 Oct 2018 09:13:17 -0700 Subject: [PATCH] Flatten bitcell array in netgen for now. See issue 52 --- compiler/verify/magic.py | 1 + 1 file changed, 1 insertion(+) diff --git a/compiler/verify/magic.py b/compiler/verify/magic.py index 55e803b4..ad8e031d 100644 --- a/compiler/verify/magic.py +++ b/compiler/verify/magic.py @@ -99,6 +99,7 @@ def write_netgen_script(cell_name, sp_name): f.write("equate class {{pfet {0}.spice}} {{p {1}}}\n".format(cell_name, sp_name)) # This circuit has symmetries and needs to be flattened to resolve them or the banks won't pass # Is there a more elegant way to add this when needed? + f.write("flatten class {{{0}.spice bitcell_array}}\n".format(cell_name)) f.write("flatten class {{{0}.spice precharge_array_1}}\n".format(cell_name)) f.write("flatten class {{{0}.spice precharge_array_2}}\n".format(cell_name)) f.write("flatten class {{{0}.spice precharge_array_3}}\n".format(cell_name))