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fix for replica column mirroring over y
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@@ -91,14 +91,16 @@ class replica_bitcell_array(design.design):
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# Replica bitlines
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self.replica_columns = {}
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for bit in range(self.left_rbl+self.right_rbl):
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# Creating left_rbl
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if bit<self.left_rbl:
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replica_bit = bit+1
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# dummy column
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column_offset = 1
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column_offset = self.left_rbl - bit
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# Creating right_rbl
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else:
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replica_bit = bit+self.row_size+1
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# dummy column + replica column + bitcell colums
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column_offset = 3 + self.row_size
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column_offset = self.left_rbl - bit + self.row_size
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self.replica_columns[bit] = factory.create(module_type="replica_column",
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rows=self.row_size,
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left_rbl=self.left_rbl,
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