mirror of https://github.com/VLSIDA/OpenRAM.git
Remove special s8 6t names
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parent
662d4ea724
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198c0faf85
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@ -50,7 +50,6 @@ class _pgate:
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class _bitcell:
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def __init__(self, mirror, cell_s8_6t, cell_6t, cell_1rw1r, cell_1w1r):
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self.mirror = mirror
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self._s8_6t = cell_s8_6t
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self._6t = cell_6t
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self._1rw1r = cell_1rw1r
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self._1w1r = cell_1w1r
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@ -58,10 +57,6 @@ class _bitcell:
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def _default():
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axis = _mirror_axis(True, False)
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cell_s8_6t = _cell({'bl': 'bl',
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'br': 'br',
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'wl': 'wl'})
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cell_6t = _cell({'bl': 'bl',
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'br': 'br',
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'wl': 'wl'})
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