mirror of https://github.com/VLSIDA/OpenRAM.git
Merge remote-tracking branch 'private/drclvs' into dev
This commit is contained in:
mrg
commit
662d4ea724
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@ -73,11 +73,11 @@ class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout):
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elif (OPTS.inline_lvsdrc or force_check or final_verification):
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tempspice = "{0}/{1}.sp".format(OPTS.openram_temp, self.name)
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tempgds = "{0}/{1}.gds".format(OPTS.openram_temp, self.name)
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self.lvs_write(tempspice)
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tempgds = "{0}/{1}.gds".format(OPTS.openram_temp, self.name)
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self.gds_write(tempgds)
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# Final verification option does not allow nets to be connected by label.
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self.drc_errors = verify.run_drc(self.cell_name, tempgds, extract=True, final_verification=final_verification)
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self.drc_errors = verify.run_drc(self.cell_name, tempgds, tempspice, extract=True, final_verification=final_verification)
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self.lvs_errors = verify.run_lvs(self.cell_name, tempgds, tempspice, final_verification=final_verification)
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# force_check is used to determine decoder height and other things, so we shouldn't fail
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@ -105,9 +105,11 @@ class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout):
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if OPTS.netlist_only:
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return
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elif (not OPTS.is_unit_test and OPTS.check_lvsdrc and (OPTS.inline_lvsdrc or final_verification)):
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tempgds = "{0}/{1}.gds".format(OPTS.openram_temp, self.cell_name)
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tempspice = "{0}{1}.sp".format(OPTS.openram_temp, self.name)
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self.lvs_write(tempspice)
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tempgds = "{0}{1}.gds".format(OPTS.openram_temp, self.cell_name)
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self.gds_write(tempgds)
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num_errors = verify.run_drc(self.cell_name, tempgds, final_verification=final_verification)
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num_errors = verify.run_drc(self.cell_name, tempgds, tempspice, final_verification=final_verification)
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debug.check(num_errors == 0,
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"DRC failed for {0} with {1} error(s)".format(self.cell_name,
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num_errors))
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@ -126,9 +128,9 @@ class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout):
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if OPTS.netlist_only:
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return
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elif (not OPTS.is_unit_test and OPTS.check_lvsdrc and (OPTS.inline_lvsdrc or final_verification)):
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tempspice = "{0}/{1}.sp".format(OPTS.openram_temp, self.cell_name)
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tempgds = "{0}/{1}.gds".format(OPTS.openram_temp, self.name)
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tempspice = "{0}{1}.sp".format(OPTS.openram_temp, self.cell_name)
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self.lvs_write(tempspice)
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tempgds = "{0}{1}.gds".format(OPTS.openram_temp, self.name)
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self.gds_write(tempgds)
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num_errors = verify.run_lvs(self.name, tempgds, tempspice, final_verification=final_verification)
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debug.check(num_errors == 0,
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@ -296,6 +296,18 @@ class spice():
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sp.write("\n.SUBCKT {0} {1}\n".format(self.cell_name,
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" ".join(self.pins)))
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# write a PININFO line
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pin_info = "*.PININFO"
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for pin in self.pins:
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if self.pin_type[pin] == "INPUT":
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pin_info += " {0}:I".format(pin)
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elif self.pin_type[pin] == "OUTPUT":
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pin_info += " {0}:O".format(pin)
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else:
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pin_info += " {0}:B".format(pin)
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sp.write(pin_info + "\n")
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# Also write pins as comments
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for pin in self.pins:
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sp.write("* {1:6}: {0} \n".format(pin, self.pin_type[pin]))
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@ -5,7 +5,6 @@
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#
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from bitcell_base_array import bitcell_base_array
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from sram_factory import factory
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from tech import cell_properties as props
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from globals import OPTS
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@ -77,15 +76,17 @@ class dummy_array(bitcell_base_array):
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for col in range(self.column_size):
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for port in self.all_ports:
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bl_pin = self.cell_inst[0, col].get_pin(bitline_names[2 * port])
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self.add_rect(layer=bl_pin.layer,
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offset=bl_pin.ll().scale(1, 0),
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width=bl_pin.width(),
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height=self.height)
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self.add_layout_pin(text="bl_{0}_{1}".format(port, col),
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layer=bl_pin.layer,
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offset=bl_pin.ll().scale(1, 0),
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width=bl_pin.width(),
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height=self.height)
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br_pin = self.cell_inst[0, col].get_pin(bitline_names[2 * port + 1])
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self.add_rect(layer=br_pin.layer,
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offset=br_pin.ll().scale(1, 0),
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width=br_pin.width(),
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height=self.height)
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self.add_layout_pin(text="br_{0}_{1}".format(port, col),
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layer=br_pin.layer,
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offset=br_pin.ll().scale(1, 0),
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width=br_pin.width(),
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height=self.height)
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wl_names = self.cell.get_all_wl_names()
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for row in range(self.row_size):
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@ -1,69 +0,0 @@
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#!/usr/bin/env python3
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# See LICENSE for licensing information.
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#
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# Copyright (c) 2016-2019 Regents of the University of California and The Board
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# of Regents for the Oklahoma Agricultural and Mechanical College
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# (acting for and on behalf of Oklahoma State University)
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# All rights reserved.
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#
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import unittest
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from testutils import *
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import sys, os,re
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#sys.path.append(os.getenv("OPENRAM_HOME"))
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import globals
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from globals import OPTS
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import debug
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class library_drc_test(openram_test):
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def runTest(self):
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config_file = "{}/tests/configs/config".format(os.getenv("OPENRAM_HOME"))
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globals.init_openram(config_file)
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import verify
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(gds_dir, allnames) = setup_files()
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drc_errors = 0
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debug.info(1, "\nPerforming DRC on: " + ", ".join(allnames))
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for f in allnames:
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gds_name = "{0}/{1}.gds".format(gds_dir, f)
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if not os.path.isfile(gds_name):
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drc_errors += 1
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debug.error("Missing GDS file: {}".format(gds_name))
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drc_errors += verify.run_drc(f, gds_name)
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# fails if there are any DRC errors on any cells
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self.assertEqual(drc_errors, 0)
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globals.end_openram()
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def setup_files():
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gds_dir = OPTS.openram_tech + "/gds_lib"
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files = os.listdir(gds_dir)
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nametest = re.compile("\.gds$", re.IGNORECASE)
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gds_files = list(filter(nametest.search, files))
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tempnames = gds_files
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# remove the .gds and .sp suffixes
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for i in range(len(tempnames)):
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gds_files[i] = re.sub('\.gds$', '', tempnames[i])
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try:
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from tech import blackbox_cells
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nameset = list(set(tempnames) - set(blackbox_cells))
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except ImportError:
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# remove duplicate base names
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nameset = set(tempnames)
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allnames = list(nameset)
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return (gds_dir, allnames)
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# run the test from the command line
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if __name__ == "__main__":
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(OPTS, args) = globals.parse_args()
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del sys.argv[1:]
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header(__file__, OPTS.tech_name)
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unittest.main(testRunner=debugTestRunner())
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@ -36,13 +36,14 @@ class library_lvs_test(openram_test):
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if not os.path.isfile(sp_name):
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lvs_errors += 1
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debug.error("Missing SPICE file {}".format(sp_name))
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drc_errors += verify.run_drc(name, gds_name)
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drc_errors += verify.run_drc(name, gds_name, sp_name)
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lvs_errors += verify.run_lvs(f, gds_name, sp_name)
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# fail if the error count is not zero
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self.assertEqual(drc_errors+lvs_errors, 0)
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self.assertEqual(drc_errors + lvs_errors, 0)
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globals.end_openram()
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def setup_files():
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gds_dir = OPTS.openram_tech + "/gds_lib"
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sp_dir = OPTS.openram_tech + "/lvs_lib"
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@ -25,7 +25,7 @@ class openram_test(unittest.TestCase):
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w.gds_write(tempgds)
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import verify
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result=verify.run_drc(w.name, tempgds)
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result=verify.run_drc(w.name, tempgds, None)
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if result != 0:
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self.fail("DRC failed: {}".format(w.name))
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@ -48,7 +48,7 @@ class openram_test(unittest.TestCase):
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# Run both DRC and LVS even if DRC might fail
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# Magic can still extract despite DRC failing, so it might be ok in some techs
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# if we ignore things like minimum metal area of pins
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drc_result=verify.run_drc(a.name, tempgds, extract=True, final_verification=final_verification)
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drc_result=verify.run_drc(a.name, tempgds, tempspice, extract=True, final_verification=final_verification)
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# We can still run LVS even if DRC fails in Magic OR Calibre
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lvs_result=verify.run_lvs(a.name, tempgds, tempspice, final_verification=final_verification)
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|
|
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@ -30,9 +30,13 @@ num_lvs_runs = 0
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num_pex_runs = 0
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def write_drc_script(cell_name, gds_name, extract, final_verification, output_path):
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def write_drc_script(cell_name, gds_name, extract, final_verification=False, output_path=None):
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""" Write a Calibre runset file and script to run DRC """
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# the runset file contains all the options to run calibre
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if not output_path:
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output_path = OPTS.openram_temp
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from tech import drc
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drc_rules = drc["drc_rules"]
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@ -68,9 +72,12 @@ def write_drc_script(cell_name, gds_name, extract, final_verification, output_pa
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return drc_runset
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def write_lvs_script(cell_name, gds_name, sp_name, final_verification, output_path):
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def write_lvs_script(cell_name, gds_name, sp_name, final_verification=False, output_path=None):
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""" Write a Calibre runset file and script to run LVS """
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if not output_path:
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output_path = OPTS.openram_temp
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from tech import drc
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lvs_rules = drc["lvs_rules"]
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lvs_runset = {
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|
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@ -132,8 +139,12 @@ def write_lvs_script(cell_name, gds_name, sp_name, final_verification, output_pa
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return lvs_runset
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def write_pex_script(cell_name, extract, output, final_verification, output_path):
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def write_pex_script(cell_name, extract, output, final_verification=False, output_path=None):
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""" Write a pex script that can either just extract the netlist or the netlist+parasitics """
|
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|
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if not output_path:
|
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output_path = OPTS.openram_temp
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|
||||
if output == None:
|
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output = cell_name + ".pex.sp"
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|
||||
|
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@ -142,7 +153,7 @@ def write_pex_script(cell_name, extract, output, final_verification, output_path
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if not os.path.isfile(output_path + cell_name + ".lvs.report"):
|
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gds_name = output_path +"/"+ cell_name + ".gds"
|
||||
sp_name = output_path +"/"+ cell_name + ".sp"
|
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run_drc(cell_name, gds_name)
|
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run_drc(cell_name, gds_name, sp_name)
|
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run_lvs(cell_name, gds_name, sp_name)
|
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|
||||
from tech import drc
|
||||
|
|
@ -181,7 +192,7 @@ def write_pex_script(cell_name, extract, output, final_verification, output_path
|
|||
return pex_runset
|
||||
|
||||
|
||||
def run_drc(cell_name, gds_name, extract=False, final_verification=False):
|
||||
def run_drc(cell_name, gds_name, sp_name, extract=False, final_verification=False):
|
||||
"""Run DRC check on a given top-level name which is
|
||||
implemented in gds_name."""
|
||||
|
||||
|
|
|
|||
|
|
@ -66,7 +66,7 @@ num_pex_runs = 0
|
|||
# (outfile, errfile, resultsfile) = run_script(cell_name, "filter")
|
||||
|
||||
|
||||
def write_drc_script(cell_name, gds_name, extract, final_verification, output_path):
|
||||
def write_drc_script(cell_name, gds_name, extract, final_verification, output_path, sp_name=None):
|
||||
""" Write a magic script to perform DRC and optionally extraction. """
|
||||
|
||||
global OPTS
|
||||
|
|
@ -102,35 +102,38 @@ def write_drc_script(cell_name, gds_name, extract, final_verification, output_pa
|
|||
f.write("drc catchup\n")
|
||||
f.write("drc count total\n")
|
||||
f.write("drc count\n")
|
||||
f.write("port makeall\n")
|
||||
if not sp_name:
|
||||
f.write("port makeall\n")
|
||||
else:
|
||||
f.write("readspice {}\n".format(sp_name))
|
||||
if not extract:
|
||||
pre = "#"
|
||||
else:
|
||||
pre = ""
|
||||
if final_verification and OPTS.route_supplies:
|
||||
f.write(pre + "extract unique all\n".format(cell_name))
|
||||
f.write(pre + "extract unique all\n")
|
||||
# Hack to work around unit scales in SkyWater
|
||||
if OPTS.tech_name=="sky130":
|
||||
f.write(pre + "extract style ngspice(si)\n")
|
||||
f.write(pre + "extract\n".format(cell_name))
|
||||
f.write(pre + "extract\n")
|
||||
# f.write(pre + "ext2spice hierarchy on\n")
|
||||
# f.write(pre + "ext2spice scale off\n")
|
||||
# lvs exists in 8.2.79, but be backword compatible for now
|
||||
#f.write(pre+"ext2spice lvs\n")
|
||||
f.write(pre+"ext2spice hierarchy on\n")
|
||||
f.write(pre+"ext2spice format ngspice\n")
|
||||
f.write(pre+"ext2spice cthresh infinite\n")
|
||||
f.write(pre+"ext2spice rthresh infinite\n")
|
||||
f.write(pre+"ext2spice renumber off\n")
|
||||
f.write(pre+"ext2spice scale off\n")
|
||||
f.write(pre+"ext2spice blackbox on\n")
|
||||
f.write(pre+"ext2spice subcircuit top on\n")
|
||||
f.write(pre+"ext2spice global off\n")
|
||||
# f.write(pre + "ext2spice lvs\n")
|
||||
f.write(pre + "ext2spice hierarchy on\n")
|
||||
f.write(pre + "ext2spice format ngspice\n")
|
||||
f.write(pre + "ext2spice cthresh infinite\n")
|
||||
f.write(pre + "ext2spice rthresh infinite\n")
|
||||
f.write(pre + "ext2spice renumber off\n")
|
||||
f.write(pre + "ext2spice scale off\n")
|
||||
f.write(pre + "ext2spice blackbox on\n")
|
||||
f.write(pre + "ext2spice subcircuit top on\n")
|
||||
f.write(pre + "ext2spice global off\n")
|
||||
|
||||
# Can choose hspice, ngspice, or spice3,
|
||||
# but they all seem compatible enough.
|
||||
f.write(pre+"ext2spice format ngspice\n")
|
||||
f.write(pre+"ext2spice {}\n".format(cell_name))
|
||||
f.write(pre + "ext2spice format ngspice\n")
|
||||
f.write(pre + "ext2spice {}\n".format(cell_name))
|
||||
f.write("quit -noprompt\n")
|
||||
f.write("EOF\n")
|
||||
|
||||
|
|
@ -138,7 +141,7 @@ def write_drc_script(cell_name, gds_name, extract, final_verification, output_pa
|
|||
os.system("chmod u+x {}".format(run_file))
|
||||
|
||||
|
||||
def run_drc(cell_name, gds_name, extract=True, final_verification=False):
|
||||
def run_drc(cell_name, gds_name, sp_name=None, extract=True, final_verification=False):
|
||||
"""Run DRC check on a cell which is implemented in gds_name."""
|
||||
|
||||
global num_drc_runs
|
||||
|
|
@ -148,7 +151,7 @@ def run_drc(cell_name, gds_name, extract=True, final_verification=False):
|
|||
if os.path.dirname(gds_name)!=OPTS.openram_temp.rstrip('/'):
|
||||
shutil.copy(gds_name, OPTS.openram_temp)
|
||||
|
||||
write_drc_script(cell_name, gds_name, extract, final_verification, OPTS.openram_temp)
|
||||
write_drc_script(cell_name, gds_name, extract, final_verification, OPTS.openram_temp, sp_name=sp_name)
|
||||
|
||||
(outfile, errfile, resultsfile) = run_script(cell_name, "drc")
|
||||
|
||||
|
|
@ -161,7 +164,7 @@ def run_drc(cell_name, gds_name, extract=True, final_verification=False):
|
|||
try:
|
||||
f = open(outfile, "r")
|
||||
except FileNotFoundError:
|
||||
debug.error("Unable to load DRC results file from {}. Is magic set up?".format(outfile),1)
|
||||
debug.error("Unable to load DRC results file from {}. Is magic set up?".format(outfile), 1)
|
||||
|
||||
results = f.readlines()
|
||||
f.close()
|
||||
|
|
@ -172,7 +175,7 @@ def run_drc(cell_name, gds_name, extract=True, final_verification=False):
|
|||
errors = int(re.split(": ", line)[1])
|
||||
break
|
||||
else:
|
||||
debug.error("Unable to find the total error line in Magic output.",1)
|
||||
debug.error("Unable to find the total error line in Magic output.", 1)
|
||||
|
||||
|
||||
# always display this summary
|
||||
|
|
@ -180,7 +183,7 @@ def run_drc(cell_name, gds_name, extract=True, final_verification=False):
|
|||
if errors > 0:
|
||||
for line in results:
|
||||
if "error tiles" in line:
|
||||
debug.info(1,line.rstrip("\n"))
|
||||
debug.info(1, line.rstrip("\n"))
|
||||
debug.warning(result_str)
|
||||
else:
|
||||
debug.info(1, result_str)
|
||||
|
|
@ -188,11 +191,14 @@ def run_drc(cell_name, gds_name, extract=True, final_verification=False):
|
|||
return errors
|
||||
|
||||
|
||||
def write_lvs_script(cell_name, gds_name, sp_name, final_verification, output_path):
|
||||
def write_lvs_script(cell_name, gds_name, sp_name, final_verification=False, output_path=None):
|
||||
""" Write a netgen script to perform LVS. """
|
||||
|
||||
global OPTS
|
||||
|
||||
if not output_path:
|
||||
output_path = OPTS.openram_temp
|
||||
|
||||
setup_file = "setup.tcl"
|
||||
full_setup_file = OPTS.openram_tech + "tech/" + setup_file
|
||||
if os.path.exists(full_setup_file):
|
||||
|
|
@ -207,14 +213,14 @@ def write_lvs_script(cell_name, gds_name, sp_name, final_verification, output_pa
|
|||
f.write("{} -noconsole << EOF\n".format(OPTS.lvs_exe[1]))
|
||||
# f.write("readnet spice {0}.spice\n".format(cell_name))
|
||||
# f.write("readnet spice {0}\n".format(sp_name))
|
||||
f.write("lvs {{{0}.spice {0}}} {{{1} {0}}} {2} {0}.lvs.report -json\n".format(cell_name, sp_name, setup_file))
|
||||
f.write("lvs {{{0}.spice {0}}} {{{1} {0}}} {2} {0}.lvs.report -full -json\n".format(cell_name, sp_name, setup_file))
|
||||
f.write("quit\n")
|
||||
f.write("EOF\n")
|
||||
f.close()
|
||||
os.system("chmod u+x {}".format(run_file))
|
||||
|
||||
|
||||
def run_lvs(cell_name, gds_name, sp_name, final_verification=False):
|
||||
def run_lvs(cell_name, gds_name, sp_name, final_verification=False, output_path=None):
|
||||
"""Run LVS check on a given top-level name which is
|
||||
implemented in gds_name and sp_name. Final verification will
|
||||
ensure that there are no remaining virtual conections. """
|
||||
|
|
@ -222,13 +228,16 @@ def run_lvs(cell_name, gds_name, sp_name, final_verification=False):
|
|||
global num_lvs_runs
|
||||
num_lvs_runs += 1
|
||||
|
||||
if not output_path:
|
||||
output_path = OPTS.openram_temp
|
||||
|
||||
# Copy file to local dir if it isn't already
|
||||
if os.path.dirname(gds_name)!=OPTS.openram_temp.rstrip('/'):
|
||||
shutil.copy(gds_name, OPTS.openram_temp)
|
||||
if os.path.dirname(sp_name)!=OPTS.openram_temp.rstrip('/'):
|
||||
shutil.copy(sp_name, OPTS.openram_temp)
|
||||
if os.path.dirname(gds_name) != output_path.rstrip('/'):
|
||||
shutil.copy(gds_name, output_path)
|
||||
if os.path.dirname(sp_name) != output_path.rstrip('/'):
|
||||
shutil.copy(sp_name, output_path)
|
||||
|
||||
write_lvs_script(cell_name, gds_name, sp_name, final_verification, OPTS.openram_temp)
|
||||
write_lvs_script(cell_name, gds_name, sp_name, final_verification)
|
||||
|
||||
(outfile, errfile, resultsfile) = run_script(cell_name, "lvs")
|
||||
|
||||
|
|
@ -289,13 +298,20 @@ def run_lvs(cell_name, gds_name, sp_name, final_verification=False):
|
|||
return total_errors
|
||||
|
||||
|
||||
def run_pex(name, gds_name, sp_name, output=None, final_verification=False):
|
||||
def run_pex(name, gds_name, sp_name, output=None, final_verification=False, output_path=None):
|
||||
"""Run pex on a given top-level name which is
|
||||
implemented in gds_name and sp_name. """
|
||||
|
||||
global num_pex_runs
|
||||
num_pex_runs += 1
|
||||
os.chdir(OPTS.openram_temp)
|
||||
|
||||
if not output_path:
|
||||
output_path = OPTS.openram_temp
|
||||
|
||||
os.chdir(output_path)
|
||||
|
||||
if not output_path:
|
||||
output_path = OPTS.openram_temp
|
||||
|
||||
if output == None:
|
||||
output = name + ".pex.netlist"
|
||||
|
|
@ -309,10 +325,10 @@ def run_pex(name, gds_name, sp_name, output=None, final_verification=False):
|
|||
# pex_fix did run the pex using a script while dev orignial method
|
||||
# use batch mode.
|
||||
# the dev old code using batch mode does not run and is split into functions
|
||||
pex_runset = write_script_pex_rule(gds_name, name, output)
|
||||
pex_runset = write_script_pex_rule(gds_name, name, sp_name, output)
|
||||
|
||||
errfile = "{0}{1}.pex.err".format(OPTS.openram_temp, name)
|
||||
outfile = "{0}{1}.pex.out".format(OPTS.openram_temp, name)
|
||||
errfile = "{0}{1}.pex.err".format(output_path, name)
|
||||
outfile = "{0}{1}.pex.out".format(output_path, name)
|
||||
|
||||
script_cmd = "{0} 2> {1} 1> {2}".format(pex_runset,
|
||||
errfile,
|
||||
|
|
@ -387,7 +403,7 @@ def write_batch_pex_rule(gds_name, name, sp_name, output):
|
|||
return file
|
||||
|
||||
|
||||
def write_script_pex_rule(gds_name, cell_name, output):
|
||||
def write_script_pex_rule(gds_name, cell_name, sp_name, output):
|
||||
global OPTS
|
||||
run_file = OPTS.openram_temp + "run_pex.sh"
|
||||
f = open(run_file, "w")
|
||||
|
|
@ -399,26 +415,24 @@ def write_script_pex_rule(gds_name, cell_name, output):
|
|||
f.write("load {}\n".format(cell_name))
|
||||
f.write("select top cell\n")
|
||||
f.write("expand\n")
|
||||
f.write("port makeall\n")
|
||||
extract = True
|
||||
if not extract:
|
||||
pre = "#"
|
||||
if not sp_name:
|
||||
f.write("port makeall\n")
|
||||
else:
|
||||
pre = ""
|
||||
f.write(pre + "extract\n")
|
||||
f.write(pre + "ext2sim labels on\n")
|
||||
f.write(pre + "ext2sim\n")
|
||||
f.write(pre + "extresist simplify off\n")
|
||||
f.write(pre + "extresist all\n")
|
||||
f.write(pre + "ext2spice hierarchy off\n")
|
||||
f.write(pre + "ext2spice format ngspice\n")
|
||||
f.write(pre + "ext2spice renumber off\n")
|
||||
f.write(pre + "ext2spice scale off\n")
|
||||
f.write(pre + "ext2spice blackbox on\n")
|
||||
f.write(pre + "ext2spice subcircuit top on\n")
|
||||
f.write(pre + "ext2spice global off\n")
|
||||
f.write(pre + "ext2spice extresist on\n")
|
||||
f.write(pre + "ext2spice {}\n".format(cell_name))
|
||||
f.write("readspice {}\n".format(sp_name))
|
||||
f.write("extract\n")
|
||||
f.write("ext2sim labels on\n")
|
||||
f.write("ext2sim\n")
|
||||
f.write("extresist simplify off\n")
|
||||
f.write("extresist all\n")
|
||||
f.write("ext2spice hierarchy off\n")
|
||||
f.write("ext2spice format ngspice\n")
|
||||
f.write("ext2spice renumber off\n")
|
||||
f.write("ext2spice scale off\n")
|
||||
f.write("ext2spice blackbox on\n")
|
||||
f.write("ext2spice subcircuit top on\n")
|
||||
f.write("ext2spice global off\n")
|
||||
f.write("ext2spice extresist on\n")
|
||||
f.write("ext2spice {}\n".format(cell_name))
|
||||
f.write("quit -noprompt\n")
|
||||
f.write("eof\n")
|
||||
f.write("mv {0}.spice {1}\n".format(cell_name, output))
|
||||
|
|
|
|||
|
|
@ -17,11 +17,11 @@ lvs_warned = False
|
|||
pex_warned = False
|
||||
|
||||
|
||||
def write_drc_script(cell_name, gds_name, extract, final_verification, output_path):
|
||||
def write_drc_script(cell_name, gds_name, extract, final_verification=False, output_path=None):
|
||||
pass
|
||||
|
||||
|
||||
def run_drc(cell_name, gds_name, extract=False, final_verification=False):
|
||||
def run_drc(cell_name, gds_name, sp_name, extract=False, final_verification=False, output_path=None):
|
||||
global drc_warned
|
||||
if not drc_warned:
|
||||
debug.error("DRC unable to run.", -1)
|
||||
|
|
@ -30,11 +30,11 @@ def run_drc(cell_name, gds_name, extract=False, final_verification=False):
|
|||
return 1
|
||||
|
||||
|
||||
def write_lvs_script(cell_name, gds_name, sp_name, final_verification, output_path):
|
||||
def write_lvs_script(cell_name, gds_name, sp_name, final_verification=False, output_path=None):
|
||||
pass
|
||||
|
||||
|
||||
def run_lvs(cell_name, gds_name, sp_name, final_verification=False):
|
||||
def run_lvs(cell_name, gds_name, sp_name, final_verification=False, output_path=None):
|
||||
global lvs_warned
|
||||
if not lvs_warned:
|
||||
debug.error("LVS unable to run.", -1)
|
||||
|
|
@ -43,7 +43,7 @@ def run_lvs(cell_name, gds_name, sp_name, final_verification=False):
|
|||
return 1
|
||||
|
||||
|
||||
def run_pex(name, gds_name, sp_name, output=None, final_verification=False):
|
||||
def run_pex(name, gds_name, sp_name, output=None, final_verification=False, output_path=None):
|
||||
global pex_warned
|
||||
if not pex_warned:
|
||||
debug.error("PEX unable to run.", -1)
|
||||
|
|
|
|||
Loading…
Reference in New Issue