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Unique name for sram channel routes

This commit is contained in:
mrg 2020-10-01 09:55:34 -07:00
parent aaa36bf5cf
commit 18c8ad265e
1 changed files with 3 additions and 3 deletions
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6
compiler/sram/sram_1bank.py
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@ -414,7 +414,7 @@ class sram_1bank(sram_base):
layer_stack=self.m1_stack, layer_stack=self.m1_stack,
parent=self) parent=self)
if add_routes: if add_routes:
self.add_inst("hc", cr) self.add_inst(cr.name, cr)
self.connect_inst([]) self.connect_inst([])
else: else:
self.col_addr_bus_size[port] = cr.height self.col_addr_bus_size[port] = cr.height
@ -470,7 +470,7 @@ class sram_1bank(sram_base):
layer_stack=layer_stack, layer_stack=layer_stack,
parent=self) parent=self)
if add_routes: if add_routes:
self.add_inst("hc", cr) self.add_inst(cr.name, cr)
self.connect_inst([]) self.connect_inst([])
else: else:
self.data_bus_size[port] = max(cr.height, self.col_addr_bus_size[port]) + self.data_bus_gap self.data_bus_size[port] = max(cr.height, self.col_addr_bus_size[port]) + self.data_bus_gap
@ -482,7 +482,7 @@ class sram_1bank(sram_base):
layer_stack=layer_stack, layer_stack=layer_stack,
parent=self) parent=self)
if add_routes: if add_routes:
self.add_inst("hc", cr) self.add_inst(cr.name, cr)
self.connect_inst([]) self.connect_inst([])
else: else:
self.data_bus_size[port] = max(cr.height, self.col_addr_bus_size[port]) + self.data_bus_gap self.data_bus_size[port] = max(cr.height, self.col_addr_bus_size[port]) + self.data_bus_gap