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Convert dff to VTG transistors in 45nm. Correct pin order in dff library cell.

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mguthaus
2018-02-16 10:40:05 -08:00
parent cb449a1cd2
commit 1297cb4e40
3 changed files with 2 additions and 2 deletions
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compiler/modules/dff.py
+1 -1
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@@ -10,7 +10,7 @@ class dff(design.design):
Memory address flip-flop
"""
pin_names = ["d", "clk", "q", "vdd", "gnd"]
pin_names = ["d", "q", "clk", "vdd", "gnd"]
(width,height) = utils.get_libcell_size("dff", GDS["unit"], layer["boundary"])
pin_map = utils.get_libcell_pins(pin_names, "dff", GDS["unit"], layer["boundary"])