diff --git a/compiler/modules/dff.py b/compiler/modules/dff.py
index 2a5c459b..2db12281 100644
--- a/compiler/modules/dff.py
+++ b/compiler/modules/dff.py
@@ -10,7 +10,7 @@ class dff(design.design):
     Memory address flip-flop
     """
 
-    pin_names = ["d", "clk", "q", "vdd", "gnd"]
+    pin_names = ["d", "q", "clk", "vdd", "gnd"]
     (width,height) = utils.get_libcell_size("dff", GDS["unit"], layer["boundary"])
     pin_map = utils.get_libcell_pins(pin_names, "dff", GDS["unit"], layer["boundary"])
     
diff --git a/technology/freepdk45/gds_lib/dff.gds b/technology/freepdk45/gds_lib/dff.gds
index b5501ebc..57202026 100644
Binary files a/technology/freepdk45/gds_lib/dff.gds and b/technology/freepdk45/gds_lib/dff.gds differ
diff --git a/technology/freepdk45/sp_lib/dff.sp b/technology/freepdk45/sp_lib/dff.sp
index ac73cdfa..8cc62891 100644
--- a/technology/freepdk45/sp_lib/dff.sp
+++ b/technology/freepdk45/sp_lib/dff.sp
@@ -3,7 +3,7 @@
 * Program "Calibre xRC"
 * Version "v2007.2_34.24"
 * 
-.subckt dff d clk q vdd gnd
+.subckt dff d q clk vdd gnd
 * 
 MM21 q a_66_6# gnd gnd NMOS_VTG L=5e-08 W=5e-07
 MM19 a_76_6# a_2_6# a_66_6# gnd NMOS_VTG L=5e-08 W=2.5e-07