Set default port map

compiler/base/custom_cell_properties.py

@@ -23,7 +23,8 @@ class cell:
         # by default it is 1:1
         if not port_map:
             self._port_map = {x: x for x in port_order}
-
+        else:
+            self._port_map = port_map
         # Update mapping of names
         self._original_port_order = port_order
         self._port_order = port_order
@@ -81,7 +82,7 @@ class cell:
     def port_map(self, port_map):
         self._port_map = port_map
         # Update ordered name list to use the new names
-        self._port_names = [self.port_map[x] for x in self._port_order]
+        self._port_names = [self._port_map[x] for x in self._port_order]
         
     @property
     def body_bias(self):

compiler/options.py

@@ -162,7 +162,7 @@ class options(optparse.Values):
     inv_dec = "pinv"
     nand2_dec = "pnand2"
     nand3_dec = "pnand3"
-    nand4_dec = "pnand4" # Not available right now
+    nand4_dec = "pnand4"
     precharge_array = "precharge_array"
     ptx = "ptx"
     replica_bitline = "replica_bitline"