Fix errors in new run_sim calls and corners

This commit is contained in:
mrg
2020-11-09 13:59:46 -08:00
parent e31cbeaa6f
commit 0ba2feee53
13 changed files with 13 additions and 20 deletions
@@ -46,8 +46,7 @@ class sram_1bank_4mux_func_test(openram_test):
tempspice = OPTS.openram_temp + "sram.sp"
s.sp_write(tempspice)
corner = (OPTS.process_corners[0], OPTS.supply_voltages[0], OPTS.temperatures[0])
f = functional(s.s, tempspice, corner)
f = functional(s.s, tempspice)
(fail, error) = f.run()
self.assertTrue(fail, error)
@@ -49,8 +49,7 @@ class sram_1bank_8mux_func_test(openram_test):
tempspice = OPTS.openram_temp + "sram.sp"
s.sp_write(tempspice)
corner = (OPTS.process_corners[0], OPTS.supply_voltages[0], OPTS.temperatures[0])
f = functional(s.s, tempspice, corner)
f = functional(s.s, tempspice)
(fail, error) = f.run()
self.assertTrue(fail, error)
@@ -49,8 +49,7 @@ class psram_1bank_nomux_func_test(openram_test):
tempspice = OPTS.openram_temp + "sram.sp"
s.sp_write(tempspice)
corner = (OPTS.process_corners[0], OPTS.supply_voltages[0], OPTS.temperatures[0])
f = functional(s.s, tempspice, corner)
f = functional(s.s, tempspice)
(fail, error) = f.run()
self.assertTrue(fail, error)
@@ -45,8 +45,7 @@ class sram_1bank_nomux_func_test(openram_test):
tempspice = OPTS.openram_temp + "sram.sp"
s.sp_write(tempspice)
corner = (OPTS.process_corners[0], OPTS.supply_voltages[0], OPTS.temperatures[0])
f = functional(s.s, tempspice, corner)
f = functional(s.s, tempspice)
(fail, error) = f.run()
self.assertTrue(fail, error)
@@ -46,8 +46,7 @@ class sram_1bank_nomux_sparecols_func_test(openram_test):
tempspice = OPTS.openram_temp + "sram.sp"
s.sp_write(tempspice)
corner = (OPTS.process_corners[0], OPTS.supply_voltages[0], OPTS.temperatures[0])
f = functional(s.s, tempspice, corner)
f = functional(s.s, tempspice)
(fail, error) = f.run()
self.assertTrue(fail, error)
@@ -52,8 +52,7 @@ class sram_wmask_1w_1r_func_test(openram_test):
tempspice = OPTS.openram_temp + "sram.sp"
s.sp_write(tempspice)
corner = (OPTS.process_corners[0], OPTS.supply_voltages[0], OPTS.temperatures[0])
f = functional(s.s, tempspice, corner)
f = functional(s.s, tempspice)
(fail, error) = f.run()
self.assertTrue(fail, error)
+1 -2
View File
@@ -48,8 +48,7 @@ class sram_wmask_func_test(openram_test):
tempspice = OPTS.openram_temp + "sram.sp"
s.sp_write(tempspice)
corner = (OPTS.process_corners[0], OPTS.supply_voltages[0], OPTS.temperatures[0])
f = functional(s.s, tempspice, corner)
f = functional(s.s, tempspice)
(fail, error) = f.run()
self.assertTrue(fail, error)
+1 -1
View File
@@ -77,7 +77,7 @@ class hspice_pex_pinv_test(openram_test):
sim_file = OPTS.openram_temp + "stim.sp"
log_file_name = "timing"
test_sim = self.write_simulation(sim_file, test_module, top_level_name)
test_sim.run_sim()
test_sim.run_sim("stim.sp")
delay = parse_spice_list(log_file_name, "pinv_delay")
return delay
+1 -1
View File
@@ -76,7 +76,7 @@ class ngspice_pex_pinv_test(openram_test):
sim_file = OPTS.openram_temp + "stim.sp"
log_file_name = "timing"
test_sim = self.write_simulation(sim_file, test_module, top_level_name)
test_sim.run_sim()
test_sim.run_sim("stim.sp")
delay = parse_spice_list(log_file_name, "pinv_delay")
return delay