Fix base bitcell syntax error. Remove some unused imports.

2026-09-04 16:51:40 +02:00 · 2020-01-30 01:58:30 +00:00
parent 79391b84da
commit 0880c393fd
2 changed files with 3 additions and 11 deletions
@@ -10,10 +10,7 @@ from tech import drc, spice
 from vector import vector
 from globals import OPTS
 from sram_factory import factory
-import logical_effort
-import bitcell_array
-import replica_column
-import dummy_array
+

 class replica_bitcell_array(design.design):
    """