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forgot to multiply all delay chain pinouts by 2 because of previous design that only exposed pins for even numbered inverters in delay chain... oops
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@ -152,7 +152,7 @@ class control_logic_delay(design.design):
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"Must use odd number of delay chain stages for inverting delay chain.")
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self.multi_delay_chain=factory.create(module_type = "multi_delay_chain",
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fanout_list = 14 * [ OPTS.delay_chain_fanout_per_stage ],
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pinout_list = [1, 6, 7, 14]) # TODO: generate this list programatically
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pinout_list = [2, 12, 14, 28]) # TODO: generate this list programatically
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# not being used
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def get_dynamic_delay_chain_size(self, previous_stages, previous_fanout):
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