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OpenRAM
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Default to no hierarchical word lines.

This commit is contained in:
mrg 2020-11-19 10:48:35 -08:00
parent 35c162acbd
commit 033111a5f3
4 changed files with 9 additions and 14 deletions
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5
compiler/modules/bank.py
View File

@ -375,10 +375,7 @@ class bank(design.design):
port=port))
self.add_mod(self.port_address[port])
try:
local_array_size = OPTS.local_array_size
except AttributeError:
local_array_size = 0
local_array_size = OPTS.local_array_size
if local_array_size > 0:
# Find the even multiple that satisfies the fanout with equal sized local arrays

7
compiler/modules/port_address.py
View File

@ -145,11 +145,10 @@ class port_address(design.design):
cols=self.num_cols)
self.add_mod(self.wordline_driver_array)
try:
local_array_size = OPTS.local_array_size
local_array_size = OPTS.local_array_size
if local_array_size > 0:
driver_size = max(int(self.num_cols / local_array_size), 1)
except AttributeError:
local_array_size = 0
else:
# Defautl to FO4
driver_size = max(int(self.num_cols / 4), 1)

4
compiler/options.py
View File

@ -31,8 +31,8 @@ class options(optparse.Values):
num_r_ports = 0
num_w_ports = 0
# By default, use local arrays with a max fanout of 16
#local_array_size = 16
# By default, don't use hierarchical wordline
local_array_size = 0
# Write mask size, default will be overwritten with word_size if not user specified
write_size = None

7
compiler/pgates/wordline_driver.py
View File

@ -44,11 +44,10 @@ class wordline_driver(design.design):
self.nand = factory.create(module_type="nand2_dec",
height=self.height)
try:
local_array_size = OPTS.local_array_size
local_array_size = OPTS.local_array_size
if local_array_size > 0:
driver_size = max(int(self.cols / local_array_size), 1)
except AttributeError:
local_array_size = 0
else:
# Defautl to FO4
driver_size = max(int(self.cols / 4), 1)