2020-06-03 23:30:15 +02:00
|
|
|
#!/usr/bin/env python3
|
|
|
|
|
# See LICENSE for licensing information.
|
|
|
|
|
#
|
2024-01-03 23:32:44 +01:00
|
|
|
# Copyright (c) 2016-2024 Regents of the University of California and The Board
|
2020-06-03 23:30:15 +02:00
|
|
|
# of Regents for the Oklahoma Agricultural and Mechanical College
|
|
|
|
|
# (acting for and on behalf of Oklahoma State University)
|
|
|
|
|
# All rights reserved.
|
|
|
|
|
#
|
2022-11-27 22:01:20 +01:00
|
|
|
import sys, os
|
2020-06-03 23:30:15 +02:00
|
|
|
import unittest
|
|
|
|
|
from testutils import *
|
2022-07-13 19:57:56 +02:00
|
|
|
|
2022-11-27 22:01:20 +01:00
|
|
|
import openram
|
|
|
|
|
from openram import debug
|
|
|
|
|
from openram.sram_factory import factory
|
|
|
|
|
from openram import OPTS
|
2020-06-03 23:30:15 +02:00
|
|
|
|
2020-11-03 22:18:46 +01:00
|
|
|
|
2020-06-03 23:30:15 +02:00
|
|
|
class single_bank_wmask_1rw_1r_test(openram_test):
|
|
|
|
|
|
|
|
|
|
def runTest(self):
|
|
|
|
|
config_file = "{}/tests/configs/config".format(os.getenv("OPENRAM_HOME"))
|
2022-11-27 22:01:20 +01:00
|
|
|
openram.init_openram(config_file, is_unit_test=True)
|
2022-12-03 00:28:06 +01:00
|
|
|
from openram import sram_config
|
2020-06-03 23:30:15 +02:00
|
|
|
|
2020-06-06 00:09:22 +02:00
|
|
|
OPTS.num_rw_ports = 1
|
|
|
|
|
OPTS.num_r_ports = 1
|
|
|
|
|
OPTS.num_w_ports = 0
|
2022-11-27 22:01:20 +01:00
|
|
|
openram.setup_bitcell()
|
2020-06-03 23:30:15 +02:00
|
|
|
|
|
|
|
|
c = sram_config(word_size=8,
|
|
|
|
|
write_size=4,
|
|
|
|
|
num_words=16,
|
|
|
|
|
num_banks=1)
|
|
|
|
|
|
|
|
|
|
c.words_per_row=1
|
|
|
|
|
c.recompute_sizes()
|
|
|
|
|
debug.info(1, "No column mux")
|
|
|
|
|
a = factory.create("bank", sram_config=c)
|
|
|
|
|
self.local_check(a)
|
|
|
|
|
|
|
|
|
|
c.num_words=32
|
|
|
|
|
c.words_per_row=2
|
|
|
|
|
c.recompute_sizes()
|
|
|
|
|
debug.info(1, "Two way column mux")
|
|
|
|
|
a = factory.create("bank", sram_config=c)
|
|
|
|
|
self.local_check(a)
|
|
|
|
|
|
|
|
|
|
c.num_words=64
|
|
|
|
|
c.words_per_row=4
|
|
|
|
|
c.recompute_sizes()
|
|
|
|
|
debug.info(1, "Four way column mux")
|
|
|
|
|
a = factory.create("bank", sram_config=c)
|
|
|
|
|
self.local_check(a)
|
|
|
|
|
|
|
|
|
|
c.num_words=128
|
|
|
|
|
c.words_per_row=8
|
|
|
|
|
c.recompute_sizes()
|
|
|
|
|
debug.info(1, "Eight way column mux")
|
|
|
|
|
a = factory.create("bank", sram_config=c)
|
|
|
|
|
self.local_check(a)
|
2020-11-03 15:29:17 +01:00
|
|
|
|
2022-11-27 22:01:20 +01:00
|
|
|
openram.end_openram()
|
|
|
|
|
|
2020-11-03 15:29:17 +01:00
|
|
|
|
2020-06-03 23:30:15 +02:00
|
|
|
# run the test from the command line
|
|
|
|
|
if __name__ == "__main__":
|
2022-11-27 22:01:20 +01:00
|
|
|
(OPTS, args) = openram.parse_args()
|
2020-06-03 23:30:15 +02:00
|
|
|
del sys.argv[1:]
|
|
|
|
|
header(__file__, OPTS.tech_name)
|
|
|
|
|
unittest.main(testRunner=debugTestRunner())
|