OpenRAM/compiler/Makefile

97 lines
2.1 KiB
Makefile
Raw Normal View History

2018-12-05 21:58:10 +01:00
TECH = scn4m_subm
CUR_DIR = $(shell pwd)
TEST_DIR = ${CUR_DIR}/tests
#MAKEFLAGS += -j 1
# Library test
2018-12-05 21:58:10 +01:00
LIBRARY_TESTS = $(shell find ${TEST_DIR} -name 0[1-2]*_test.py)
# Technology and DRC tests (along with ptx)
2018-12-05 21:58:10 +01:00
TECH_TESTS = $(shell find ${TEST_DIR} -name 03*_test.py)
# Parameterized cells
2018-12-05 21:58:10 +01:00
CELL_TESTS = $(shell find ${TEST_DIR} -name 04*_test.py)
# Dynamically generated modules and arrays
2018-12-05 21:58:10 +01:00
MODULE_TESTS = $(shell find ${TEST_DIR} -name 0[5-9]*_test.py)\
$(shell find ${TEST_DIR} -name 1*_test.py)
# Top-level SRAM configurations
2018-12-05 21:58:10 +01:00
TOP_TESTS = $(shell find ${TEST_DIR} -name 20*_test.py)
# All simulation tests.
2018-12-05 21:58:10 +01:00
CHAR_TESTS = $(shell find ${TEST_DIR} -name 2[1-2]*_test.py)
# Keep the model lib test here since it is fast
# and doesn't need simulation.
2018-12-05 21:58:10 +01:00
USAGE_TESTS = $(shell find ${TEST_DIR} -name 2[3-9]*_test.py)\
$(shell find ${TEST_DIR} -name 30*_test.py)
2018-12-05 21:58:10 +01:00
ALL_TESTS = \
${LIBRARY_TESTS} \
${TECH_TESTS} \
2018-12-05 21:58:10 +01:00
${CELL_TESTS} \
${MODULE_TESTS} \
${TOP_TESTS} \
${CHAR_TESTS} \
${USAGE_TESTS}
2018-12-05 21:58:10 +01:00
.PHONY: ${ALL_TESTS}
2018-12-05 21:58:10 +01:00
all: ${ALL_TESTS}
# Library tests
lib: ${LIBRARY_TESTS}
# Transistor and wire tests
tech: ${TECH_TESTS}
# Dynamically generated cells
2018-12-05 21:58:10 +01:00
cell: ${CELL_TESTS}
# Dynamically generated modules
2018-12-05 21:58:10 +01:00
module: ${MODULE_TESTS}
# Top level SRAM tests
top: ${TOP_TESTS}
# Timing and characterization tests
char: ${CHAR_TESTS}
# Usage and file generation
usage: ${USAGE_TESTS}
2018-12-05 21:58:10 +01:00
$(ALL_TESTS):
python3 $@ -t ${TECH}
#CONFIG_DIR = $(OPENRAM_HOME)/example_configs/model_configs
CONFIG_DIR = $(OPENRAM_HOME)/example_configs/test_configs
MODEL_CONFIGS = $(wildcard $(CONFIG_DIR)/*.py)
SIM_OUT = $(OPENRAM_TECH)/$(TECH)/sim_data
OPTS =
# Characterize and perform DRC/LVS
OPTS += -c
# Do not characterize or perform DRC/LVS
OPTS += -n
# Verbosity
#OPTS += -v
# Spice
OPTS += -s hspice
.PHONY: ${MODEL_CONFIGS}
model: $(MODEL_CONFIGS)
$(MODEL_CONFIGS):
$(eval bname=$(basename $(notdir $@)))
#echo $(bname)
mkdir -p $(SIM_OUT)/$(bname)
python3 $(OPENRAM_HOME)/openram.py $(OPTS) -p $(SIM_OUT)/$(bname) -o $(bname) $@ 2>&1 > /dev/null
clean:
find . -name \*.pyc -exec rm {} \;
find . -name \*~ -exec rm {} \;