mirror of https://github.com/VLSIDA/OpenRAM.git
42 lines
1.9 KiB
Plaintext
42 lines
1.9 KiB
Plaintext
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timestamp 1536091415
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version 8.2
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tech scmos
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style TSMC0.35um(tsmc35)from:t11c
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scale 1000 1 5
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resistclasses 3700 2800 1018000 1018000 1 6000 6000 80 70 80 40
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node "comment_0_0#" 0 0 0 0 bb 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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node "br" 6 -1.43219e-14 96 -8 ndc 320 72 0 0 0 0 0 0 0 0 0 0 0 0 512 96 3456 464 0 0 0 0
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node "bl" 6 -8.88178e-16 40 -8 ndc 320 72 0 0 0 0 0 0 0 0 0 0 0 0 512 96 3200 432 0 0 0 0
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node "wl" 115 -2.89546e-13 -8 12 p 0 0 0 0 0 0 0 0 0 0 1536 360 0 0 2496 344 0 0 0 0 0 0
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node "a_36_40#" 140 -3.51719e-13 36 40 ndif 960 144 304 72 0 0 0 0 0 0 1984 424 0 0 2048 288 0 0 0 0 0 0
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node "a_28_32#" 160 -8.06466e-13 28 32 p 960 144 304 72 0 0 0 0 0 0 2000 456 0 0 1920 272 0 0 0 0 0 0
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node "gnd" 41 -27.888 -32 -32 pw 1792 240 512 128 0 0 0 0 29600 696 0 0 0 0 2688 400 6400 864 0 0 0 0
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equiv "gnd" "gnd"
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node "vdd" 2340 2596 -32 116 nw 256 64 800 176 17600 576 0 0 0 0 0 0 0 0 3456 464 256 64 0 0 0 0
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cap "wl" "bl" 189.768
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cap "a_36_40#" "br" 17.59
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cap "wl" "br" 189.768
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cap "vdd" "bl" 135.015
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cap "bl" "br" 27.492
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cap "vdd" "br" 117.084
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cap "gnd" "a_28_32#" 880.405
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cap "gnd" "a_36_40#" 401.284
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cap "a_28_32#" "a_36_40#" 272.793
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cap "gnd" "wl" 1198.41
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cap "gnd" "bl" 712.11
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cap "a_28_32#" "wl" 108.364
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cap "vdd" "gnd" 510.12
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cap "gnd" "br" 698.471
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cap "a_36_40#" "wl" 108.364
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cap "a_28_32#" "bl" 104.205
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cap "vdd" "a_28_32#" 430.812
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cap "a_36_40#" "bl" 29.396
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cap "a_28_32#" "br" 308.488
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cap "vdd" "a_36_40#" 709.108
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fet nfet 96 12 97 13 128 48 "gnd" "wl" 16 0 "br" 16 0 "a_28_32#" 16 0
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fet nfet 40 12 41 13 128 48 "gnd" "wl" 16 0 "bl" 16 0 "a_36_40#" 16 0
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fet nfet 116 40 117 41 256 80 "gnd" "a_36_40#" 16 0 "a_28_32#" 32 0 "gnd" 32 0
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fet nfet 28 40 29 41 256 80 "gnd" "a_28_32#" 16 0 "gnd" 32 0 "a_36_40#" 32 0
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fet pfet 108 148 109 149 192 56 "vdd" "a_36_40#" 32 0 "a_28_32#" 12 0 "vdd" 12 0
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fet pfet 28 148 29 149 192 56 "vdd" "a_28_32#" 32 0 "vdd" 12 0 "a_36_40#" 12 0
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