upload freq divider
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PhillipRambo
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#--------------------------------------------------------------
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# CACE circuit characterization file
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#--------------------------------------------------------------
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name: CML_divider
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description: Current mode logic divider
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PDK: ihp-sg13g2
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cace_format: 5.2
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authorship:
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designer: Phillip F. Baade-Pedersen
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company: IHP
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creation_date:
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license: Apache 2.0
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paths:
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root: ..
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schematic: xschem/
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netlist: xschem/simulations
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documentation: docs
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pins:
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VDD:
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description: Positive analog power supply
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type: power
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direction: inout
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Vmin: 0.8
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Vmax: 1.6
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Vinplus:
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description: Positive Input
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type: signal
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direction: input
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Vinminus:
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description: Negative Input
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type: signal
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direction: input
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default_conditions:
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vdd:
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description: Analog power supply voltage
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display: Vdd
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unit: V
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typical: 1.2
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corner:
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description: Process corner
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display: Corner
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typical: tt
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temperature:
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description: Ambient temperature
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display: Temp
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unit: °C
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typical: 27
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parameters:
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ac_params:
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description: Frequency characterization of the divider
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display: CML divider frequency response
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spec:
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frequency:
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display: Frequency
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description: Output frequency of the divider
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unit: GHz
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minimum:
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value: 4.3
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typical:
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value: 5.0
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maximum:
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value: 5.2
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amplitude:
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display: Amplitude
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description: Differential output amplitude (half swing)
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unit: V
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minimum:
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value: 0.2
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typical:
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value: 0.4
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maximum:
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value: 0.6
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voltage_swing:
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display: Voltage swing
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description: Differential peak-to-peak output swing
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unit: V
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minimum:
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value: 0.4
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typical:
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value: 0.8
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maximum:
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value: 1.2
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tool:
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ngspice:
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template: CML_core_tb.sch
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format: ascii
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suffix: .data
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variables: [time, vo_diff]
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script: freq.py
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script_variables: [frequency, amplitude, voltage_swing]
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plot:
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vo_diff_vs_time:
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type: xyplot
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xaxis: time
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yaxis: vo_diff
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conditions:
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vdd:
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minimum: 0.8
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typical: 1.2
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maximum: 1.6
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corner:
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enumerate: [tt, ff, ss]
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temperature:
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minimum: -40
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typical: 27
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maximum: 80
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Binary file not shown.
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from typing import Any
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import numpy as np
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def postprocess(results: dict[str, list], conditions: dict[str, Any]) -> dict[str, list]:
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# Extract waveform
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t = np.array(results['time'])
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v = np.array(results['vo_diff'])
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if len(t) < 2 or len(v) == 0:
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return {
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'frequency': [0.0],
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'amplitude': [0.0],
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'voltage_swing': [0.0]
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}
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# --- Compute sampling frequency ---
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dt = np.mean(np.diff(t))
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fs = 1.0 / dt
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# --- FFT to find main tone ---
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Y = np.fft.fft(v - np.mean(v)) # remove DC
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freqs = np.fft.fftfreq(len(Y), d=dt)
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# Use positive frequencies only
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mask = freqs > 0
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freqs = freqs[mask]
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Y = np.abs(Y[mask])
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freq_peak = freqs[np.argmax(Y)]
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# --- Compute amplitude and voltage swing ---
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v_max = np.max(v)
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v_min = np.min(v)
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voltage_swing = v_max - v_min
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amplitude = voltage_swing / 2.0
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return {
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'frequency': [freq_peak],
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'amplitude': [amplitude],
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'voltage_swing': [voltage_swing]
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}
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@ -0,0 +1,71 @@
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v {xschem version=3.4.6 file_version=1.2}
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G {}
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K {}
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V {}
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S {}
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E {}
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N 740 -940 740 -920 {lab=GND}
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N 740 -1090 740 -1060 {lab=VDD}
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N 600 -1020 620 -1020 {lab=Vinplus}
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N 600 -980 620 -980 {lab=Vinminus}
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N 860 -1020 880 -1020 {lab=Voplus}
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N 860 -980 880 -980 {lab=Vominus}
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N 1150 -850 1150 -820 {lab=VDD}
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N 1150 -760 1150 -730 {lab=GND}
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N 930 -850 930 -820 {lab=Vinminus}
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N 930 -760 930 -730 {lab=GND}
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N 720 -850 720 -820 {lab=Vinplus}
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N 720 -760 720 -730 {lab=GND}
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C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
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value="
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.ic V(Voplus)=1.2
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.control
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set noaskquit
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set numdgt=12
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* Save & simulate
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save all
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op
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write CML_core_tb.raw
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set appendwrite
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tran 10p 1n 160p
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* Explicit vectors
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let vo_p = v(Voplus)
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let vo_m = v(Vominus)
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let vo_diff = vo_p - vo_m
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set wr_singlescale
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wrdata CACE\{simpath\}/CACE\{filename\}_CACE\{N\}.data vo_diff
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quit
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.endc
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"}
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C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
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C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
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C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
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format="tcleval( @value )"
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value="
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.lib CACE\{PDK_ROOT\}/CACE\{PDK\}/libs.tech/ngspice/models/cornerMOSlv.lib mos_CACE\{corner\}
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.include CACE\{DUT_path\}
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.temp CACE\{temperature\}
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"
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}
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C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
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C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
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C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
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C {CML_divider.sym} 740 -1000 0 1 {name=x1}
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C {vsource.sym} 1150 -790 0 0 {name=V1 value=CACE\{vdd\} savecurrent=false}
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C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
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C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
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C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
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C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
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C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
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C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
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value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
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C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
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value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
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C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
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C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
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source [file dirname [info script]]/../../xschem/xschemrc
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# CML_divider
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- Description: Current mode logic divider
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- PDK: ihp-sg13g2
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## Authorship
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- Designer: Phillip F. Baade-Pedersen
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- Company: IHP
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- Created: None
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- License: Apache 2.0
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- Last modified: None
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## Pins
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- VDD
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+ Description: Positive analog power supply
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+ Type: power
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+ Direction: inout
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+ Vmin: 0.8
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+ Vmax: 1.6
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- Vinplus
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+ Description: Positive Input
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+ Type: signal
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+ Direction: input
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- Vinminus
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+ Description: Negative Input
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+ Type: signal
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+ Direction: input
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## Default Conditions
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- vdd
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+ Description: Analog power supply voltage
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+ Display: Vdd
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+ Unit: V
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+ Typical: 1.2
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- corner
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+ Description: Process corner
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+ Display: Corner
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+ Typical: tt
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- temperature
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+ Description: Ambient temperature
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+ Display: Temp
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+ Unit: °C
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+ Typical: 27
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## Symbol
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## Schematic
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Binary file not shown.
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After Width: | Height: | Size: 183 KiB |
Binary file not shown.
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After Width: | Height: | Size: 184 KiB |
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@ -0,0 +1,17 @@
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# CACE Summary for CML_divider
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**netlist source**: schematic
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| Parameter | Tool | Result | Min Limit | Min Value | Typ Target | Typ Value | Max Limit | Max Value | Status |
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| :------------------- | :------------------- | :-------------- | ---------: | -----------: | ---------: | -----------: | ---------: | -----------: | :------: |
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| Frequency | ngspice | frequency | 4.3 GHz | 4.722 GHz | 5.0 GHz | 4.722 GHz | 5.2 GHz | 4.722 GHz | Pass ✅ |
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| Amplitude | ngspice | amplitude | 0.2 V | 0.315 V | 0.4 V | 0.382 V | 0.6 V | 0.429 V | Pass ✅ |
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| Voltage swing | ngspice | voltage_swing | 0.4 V | 0.629 V | 0.8 V | 0.763 V | 1.2 V | 0.857 V | Pass ✅ |
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## Plots
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## vo_diff_vs_time
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<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" width="1000" height="700" version="1.1">
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<style type="text/css">
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||||
.l0{
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||||
fill: #000000;
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||||
stroke: #000000;
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||||
stroke-linecap:round;
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||||
stroke-linejoin:round;
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stroke-width: 3.6666;
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}
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.l1{
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fill: #00ccee;
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stroke: #00ccee;
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stroke-linecap:round;
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stroke-linejoin:round;
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stroke-width: 3.6666;
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||||
}
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.l2{
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fill: #4f4f4f; fill-opacity: 0.2;
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stroke: #4f4f4f;
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stroke-linecap:round;
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stroke-linejoin:round;
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stroke-width: 3.6666;
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}
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.l3{
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fill: #cccccc; fill-opacity: 0.5;
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stroke: #cccccc;
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stroke-linecap:round;
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stroke-linejoin:round;
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stroke-width: 3.6666;
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}
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.l4{
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fill: #88dd00;
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stroke: #88dd00;
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stroke-linecap:round;
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stroke-linejoin:round;
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stroke-width: 3.6666;
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}
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.l5{
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fill: #bb2200;
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stroke: #bb2200;
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||||
stroke-linecap:round;
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stroke-linejoin:round;
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||||
stroke-width: 3.6666;
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}
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.l6{
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fill: #00ccee; fill-opacity: 0.5;
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stroke: #00ccee;
|
||||
stroke-linecap:round;
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||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
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||||
}
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.l7{
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||||
fill: #ff0000; fill-opacity: 0.5;
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||||
stroke: #ff0000;
|
||||
stroke-linecap:round;
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||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
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||||
}
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.l8{
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||||
fill: #ffff00; fill-opacity: 0.5;
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||||
stroke: #ffff00;
|
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stroke-linecap:round;
|
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stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
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||||
}
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||||
.l9{
|
||||
fill: #ffffff; fill-opacity: 0.5;
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||||
stroke: #ffffff;
|
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stroke-linecap:round;
|
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stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
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||||
}
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||||
.l10{
|
||||
fill: #ff00ff;
|
||||
stroke: #ff00ff;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
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||||
.l11{
|
||||
fill: #00ff00; fill-opacity: 0.5;
|
||||
stroke: #00ff00;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
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||||
.l12{
|
||||
fill: #0000ff; fill-opacity: 0.5;
|
||||
stroke: #0000ff;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
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||||
}
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||||
.l13{
|
||||
fill: #aaaa00; fill-opacity: 0.5;
|
||||
stroke: #aaaa00;
|
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stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
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||||
.l14{
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||||
fill: #aaccaa; fill-opacity: 0.2;
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||||
stroke: #aaccaa;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
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||||
.l15{
|
||||
fill: #ff7777; fill-opacity: 0.5;
|
||||
stroke: #ff7777;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l16{
|
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fill: #bfff81; fill-opacity: 0.5;
|
||||
stroke: #bfff81;
|
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stroke-linecap:round;
|
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stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l17{
|
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fill: #00ffcc; fill-opacity: 0.2;
|
||||
stroke: #00ffcc;
|
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stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
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stroke-width: 3.6666;
|
||||
}
|
||||
.l18{
|
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fill: #ce0097; fill-opacity: 0.5;
|
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stroke: #ce0097;
|
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stroke-linecap:round;
|
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stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l19{
|
||||
fill: #d2d46b; fill-opacity: 0.2;
|
||||
stroke: #d2d46b;
|
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stroke-linecap:round;
|
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stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l20{
|
||||
fill: #ef6158; fill-opacity: 0.2;
|
||||
stroke: #ef6158;
|
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stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l21{
|
||||
fill: #fdb200; fill-opacity: 0.2;
|
||||
stroke: #fdb200;
|
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stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
text {font-family: Sans-Serif;}
|
||||
</style>
|
||||
<rect class="l0" x="0" y="0" width="1000" height="700"/>
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||||
</svg>
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||||
|
After Width: | Height: | Size: 3.1 KiB |
|
|
@ -0,0 +1,160 @@
|
|||
<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" width="1000" height="700" version="1.1">
|
||||
<style type="text/css">
|
||||
.l0{
|
||||
fill: #000000;
|
||||
stroke: #000000;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l1{
|
||||
fill: #00ccee;
|
||||
stroke: #00ccee;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
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||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l2{
|
||||
fill: #4f4f4f; fill-opacity: 0.2;
|
||||
stroke: #4f4f4f;
|
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stroke-linecap:round;
|
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stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l3{
|
||||
fill: #cccccc; fill-opacity: 0.5;
|
||||
stroke: #cccccc;
|
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stroke-linecap:round;
|
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stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l4{
|
||||
fill: #88dd00;
|
||||
stroke: #88dd00;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l5{
|
||||
fill: #bb2200;
|
||||
stroke: #bb2200;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l6{
|
||||
fill: #00ccee; fill-opacity: 0.5;
|
||||
stroke: #00ccee;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l7{
|
||||
fill: #ff0000; fill-opacity: 0.5;
|
||||
stroke: #ff0000;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l8{
|
||||
fill: #ffff00; fill-opacity: 0.5;
|
||||
stroke: #ffff00;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l9{
|
||||
fill: #ffffff; fill-opacity: 0.5;
|
||||
stroke: #ffffff;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l10{
|
||||
fill: #ff00ff;
|
||||
stroke: #ff00ff;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l11{
|
||||
fill: #00ff00; fill-opacity: 0.5;
|
||||
stroke: #00ff00;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l12{
|
||||
fill: #0000ff; fill-opacity: 0.5;
|
||||
stroke: #0000ff;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l13{
|
||||
fill: #aaaa00; fill-opacity: 0.5;
|
||||
stroke: #aaaa00;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l14{
|
||||
fill: #aaccaa; fill-opacity: 0.2;
|
||||
stroke: #aaccaa;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l15{
|
||||
fill: #ff7777; fill-opacity: 0.5;
|
||||
stroke: #ff7777;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l16{
|
||||
fill: #bfff81; fill-opacity: 0.5;
|
||||
stroke: #bfff81;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l17{
|
||||
fill: #00ffcc; fill-opacity: 0.2;
|
||||
stroke: #00ffcc;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l18{
|
||||
fill: #ce0097; fill-opacity: 0.5;
|
||||
stroke: #ce0097;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l19{
|
||||
fill: #d2d46b; fill-opacity: 0.2;
|
||||
stroke: #d2d46b;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l20{
|
||||
fill: #ef6158; fill-opacity: 0.2;
|
||||
stroke: #ef6158;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
.l21{
|
||||
fill: #fdb200; fill-opacity: 0.2;
|
||||
stroke: #fdb200;
|
||||
stroke-linecap:round;
|
||||
stroke-linejoin:round;
|
||||
stroke-width: 3.6666;
|
||||
}
|
||||
text {font-family: Sans-Serif;}
|
||||
</style>
|
||||
<rect class="l0" x="0" y="0" width="1000" height="700"/>
|
||||
</svg>
|
||||
|
After Width: | Height: | Size: 3.1 KiB |
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata CACE\{simpath\}/CACE\{filename\}_CACE\{N\}.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib CACE\{PDK_ROOT\}/CACE\{PDK\}/libs.tech/ngspice/models/cornerMOSlv.lib mos_CACE\{corner\}
|
||||
|
||||
.include CACE\{DUT_path\}
|
||||
|
||||
.temp CACE\{temperature\}
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=CACE\{vdd\} savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 32 KiB |
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-37-12/parameters/Frequency/run_0/CML_core_tb_0.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_tt
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp 27
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=1.2 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -3.388323931118e-01
|
||||
1.728000000000e-10 -1.851651732117e-01
|
||||
1.828000000000e-10 -4.985209728467e-03
|
||||
1.928000000000e-10 1.464303664236e-01
|
||||
2.028000000000e-10 2.390890865534e-01
|
||||
2.128000000000e-10 2.778147857521e-01
|
||||
2.228000000000e-10 3.140298283994e-01
|
||||
2.328000000000e-10 3.564486269316e-01
|
||||
2.428000000000e-10 3.920777300126e-01
|
||||
2.528000000000e-10 4.026431485981e-01
|
||||
2.628000000000e-10 3.407818057760e-01
|
||||
2.728000000000e-10 1.919413521399e-01
|
||||
2.828000000000e-10 1.380608162301e-02
|
||||
2.928000000000e-10 -1.377275777470e-01
|
||||
3.028000000000e-10 -2.320727525709e-01
|
||||
3.128000000000e-10 -2.723718882130e-01
|
||||
3.228000000000e-10 -3.097195919600e-01
|
||||
3.328000000000e-10 -3.525356430610e-01
|
||||
3.428000000000e-10 -3.885938438581e-01
|
||||
3.528000000000e-10 -3.995683250409e-01
|
||||
3.628000000000e-10 -3.382392747069e-01
|
||||
3.728000000000e-10 -1.897685835172e-01
|
||||
3.828000000000e-10 -1.211190537496e-02
|
||||
3.928000000000e-10 1.391365825109e-01
|
||||
4.028000000000e-10 2.331433172305e-01
|
||||
4.128000000000e-10 2.733678679410e-01
|
||||
4.228000000000e-10 3.105714733021e-01
|
||||
4.328000000000e-10 3.533708758772e-01
|
||||
4.428000000000e-10 3.892622592719e-01
|
||||
4.528000000000e-10 4.001272859757e-01
|
||||
4.628000000000e-10 3.385642563623e-01
|
||||
4.728000000000e-10 1.899916781684e-01
|
||||
4.828000000000e-10 1.218033620775e-02
|
||||
4.928000000000e-10 -1.390656421002e-01
|
||||
5.028000000000e-10 -2.331398693887e-01
|
||||
5.128000000000e-10 -2.733037181082e-01
|
||||
5.228000000000e-10 -3.105518491305e-01
|
||||
5.328000000000e-10 -3.533032068815e-01
|
||||
5.428000000000e-10 -3.892531494066e-01
|
||||
5.528000000000e-10 -4.000849100741e-01
|
||||
5.628000000000e-10 -3.385845178207e-01
|
||||
5.728000000000e-10 -1.899774211598e-01
|
||||
5.828000000000e-10 -1.221996984529e-02
|
||||
5.928000000000e-10 1.390720456320e-01
|
||||
6.028000000000e-10 2.331027694491e-01
|
||||
6.128000000000e-10 2.733156842718e-01
|
||||
6.228000000000e-10 3.105197170718e-01
|
||||
6.328000000000e-10 3.533171034352e-01
|
||||
6.428000000000e-10 3.892243222051e-01
|
||||
6.528000000000e-10 4.000997182403e-01
|
||||
6.628000000000e-10 3.385594083538e-01
|
||||
6.728000000000e-10 1.899934277570e-01
|
||||
6.828000000000e-10 1.219466050150e-02
|
||||
6.928000000000e-10 -1.390553921853e-01
|
||||
7.028000000000e-10 -2.331263672195e-01
|
||||
7.128000000000e-10 -2.732987102222e-01
|
||||
7.228000000000e-10 -3.105421090081e-01
|
||||
7.328000000000e-10 -3.532994962925e-01
|
||||
7.428000000000e-10 -3.892451651423e-01
|
||||
7.528000000000e-10 -4.000824543639e-01
|
||||
7.628000000000e-10 -3.385783830881e-01
|
||||
7.728000000000e-10 -1.899748483052e-01
|
||||
7.828000000000e-10 -1.221334688082e-02
|
||||
7.928000000000e-10 1.390733351530e-01
|
||||
8.028000000000e-10 2.331082732353e-01
|
||||
8.128000000000e-10 2.733160005972e-01
|
||||
8.228000000000e-10 3.105237742784e-01
|
||||
8.328000000000e-10 3.533165556732e-01
|
||||
8.428000000000e-10 3.892279285214e-01
|
||||
8.528000000000e-10 4.000991009611e-01
|
||||
8.628000000000e-10 3.385625511294e-01
|
||||
8.728000000000e-10 1.899914169425e-01
|
||||
8.828000000000e-10 1.219669858142e-02
|
||||
8.928000000000e-10 -1.390576717936e-01
|
||||
9.028000000000e-10 -2.331245304799e-01
|
||||
9.128000000000e-10 -2.733009677599e-01
|
||||
9.228000000000e-10 -3.105397739050e-01
|
||||
9.328000000000e-10 -3.533012749995e-01
|
||||
9.428000000000e-10 -3.892430673555e-01
|
||||
9.528000000000e-10 -4.000844420176e-01
|
||||
9.628000000000e-10 -3.385768441038e-01
|
||||
9.728000000000e-10 -1.899764612955e-01
|
||||
9.828000000000e-10 -1.221122328152e-02
|
||||
9.928000000000e-10 1.390717643268e-01
|
||||
1.000000000000e-09 2.142511381663e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 0
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: tt
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-37-12/parameters/Frequency/run_0
|
||||
temperature: '27'
|
||||
vdd: '1.2'
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
run,time,vo_diff,frequency
|
||||
run_0,"[1.628e-10, 1.728e-10, 1.828e-10, …]","[-3.388e-01, -1.852e-01, -4.985e-03, …]",4.722
|
||||
|
|
|
@ -0,0 +1,5 @@
|
|||
# Simulation Summary for Freq
|
||||
|
||||
| run | time | vo_diff | frequency |
|
||||
| :-- | ---: | ------: | --------: |
|
||||
| run_0 | [1.628e-10, 1.728e-10, 1.828e-10, …] | [-3.388e-01, -1.852e-01, -4.985e-03, …] | 4.722 |
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
|
||||
# CACE Summary for CML_divider
|
||||
|
||||
**netlist source**: schematic
|
||||
|
||||
| Parameter | Tool | Result | Min Limit | Min Value | Typ Target | Typ Value | Max Limit | Max Value | Status |
|
||||
| :------------------- | :------------------- | :-------------- | ---------: | -----------: | ---------: | -----------: | ---------: | -----------: | :------: |
|
||||
| Freq | ngspice | frequency | | | | 0.000 GHz | | | Pass ✅ |
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata CACE\{simpath\}/CACE\{filename\}_CACE\{N\}.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib CACE\{PDK_ROOT\}/CACE\{PDK\}/libs.tech/ngspice/models/cornerMOSlv.lib mos_CACE\{corner\}
|
||||
|
||||
.include CACE\{DUT_path\}
|
||||
|
||||
.temp CACE\{temperature\}
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=CACE\{vdd\} savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 32 KiB |
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-37-39/parameters/Frequency/run_0/CML_core_tb_0.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_tt
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp 27
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=1.2 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -3.388323931118e-01
|
||||
1.728000000000e-10 -1.851651732117e-01
|
||||
1.828000000000e-10 -4.985209728467e-03
|
||||
1.928000000000e-10 1.464303664236e-01
|
||||
2.028000000000e-10 2.390890865534e-01
|
||||
2.128000000000e-10 2.778147857521e-01
|
||||
2.228000000000e-10 3.140298283994e-01
|
||||
2.328000000000e-10 3.564486269316e-01
|
||||
2.428000000000e-10 3.920777300126e-01
|
||||
2.528000000000e-10 4.026431485981e-01
|
||||
2.628000000000e-10 3.407818057760e-01
|
||||
2.728000000000e-10 1.919413521399e-01
|
||||
2.828000000000e-10 1.380608162301e-02
|
||||
2.928000000000e-10 -1.377275777470e-01
|
||||
3.028000000000e-10 -2.320727525709e-01
|
||||
3.128000000000e-10 -2.723718882130e-01
|
||||
3.228000000000e-10 -3.097195919600e-01
|
||||
3.328000000000e-10 -3.525356430610e-01
|
||||
3.428000000000e-10 -3.885938438581e-01
|
||||
3.528000000000e-10 -3.995683250409e-01
|
||||
3.628000000000e-10 -3.382392747069e-01
|
||||
3.728000000000e-10 -1.897685835172e-01
|
||||
3.828000000000e-10 -1.211190537496e-02
|
||||
3.928000000000e-10 1.391365825109e-01
|
||||
4.028000000000e-10 2.331433172305e-01
|
||||
4.128000000000e-10 2.733678679410e-01
|
||||
4.228000000000e-10 3.105714733021e-01
|
||||
4.328000000000e-10 3.533708758772e-01
|
||||
4.428000000000e-10 3.892622592719e-01
|
||||
4.528000000000e-10 4.001272859757e-01
|
||||
4.628000000000e-10 3.385642563623e-01
|
||||
4.728000000000e-10 1.899916781684e-01
|
||||
4.828000000000e-10 1.218033620775e-02
|
||||
4.928000000000e-10 -1.390656421002e-01
|
||||
5.028000000000e-10 -2.331398693887e-01
|
||||
5.128000000000e-10 -2.733037181082e-01
|
||||
5.228000000000e-10 -3.105518491305e-01
|
||||
5.328000000000e-10 -3.533032068815e-01
|
||||
5.428000000000e-10 -3.892531494066e-01
|
||||
5.528000000000e-10 -4.000849100741e-01
|
||||
5.628000000000e-10 -3.385845178207e-01
|
||||
5.728000000000e-10 -1.899774211598e-01
|
||||
5.828000000000e-10 -1.221996984529e-02
|
||||
5.928000000000e-10 1.390720456320e-01
|
||||
6.028000000000e-10 2.331027694491e-01
|
||||
6.128000000000e-10 2.733156842718e-01
|
||||
6.228000000000e-10 3.105197170718e-01
|
||||
6.328000000000e-10 3.533171034352e-01
|
||||
6.428000000000e-10 3.892243222051e-01
|
||||
6.528000000000e-10 4.000997182403e-01
|
||||
6.628000000000e-10 3.385594083538e-01
|
||||
6.728000000000e-10 1.899934277570e-01
|
||||
6.828000000000e-10 1.219466050150e-02
|
||||
6.928000000000e-10 -1.390553921853e-01
|
||||
7.028000000000e-10 -2.331263672195e-01
|
||||
7.128000000000e-10 -2.732987102222e-01
|
||||
7.228000000000e-10 -3.105421090081e-01
|
||||
7.328000000000e-10 -3.532994962925e-01
|
||||
7.428000000000e-10 -3.892451651423e-01
|
||||
7.528000000000e-10 -4.000824543639e-01
|
||||
7.628000000000e-10 -3.385783830881e-01
|
||||
7.728000000000e-10 -1.899748483052e-01
|
||||
7.828000000000e-10 -1.221334688082e-02
|
||||
7.928000000000e-10 1.390733351530e-01
|
||||
8.028000000000e-10 2.331082732353e-01
|
||||
8.128000000000e-10 2.733160005972e-01
|
||||
8.228000000000e-10 3.105237742784e-01
|
||||
8.328000000000e-10 3.533165556732e-01
|
||||
8.428000000000e-10 3.892279285214e-01
|
||||
8.528000000000e-10 4.000991009611e-01
|
||||
8.628000000000e-10 3.385625511294e-01
|
||||
8.728000000000e-10 1.899914169425e-01
|
||||
8.828000000000e-10 1.219669858142e-02
|
||||
8.928000000000e-10 -1.390576717936e-01
|
||||
9.028000000000e-10 -2.331245304799e-01
|
||||
9.128000000000e-10 -2.733009677599e-01
|
||||
9.228000000000e-10 -3.105397739050e-01
|
||||
9.328000000000e-10 -3.533012749995e-01
|
||||
9.428000000000e-10 -3.892430673555e-01
|
||||
9.528000000000e-10 -4.000844420176e-01
|
||||
9.628000000000e-10 -3.385768441038e-01
|
||||
9.728000000000e-10 -1.899764612955e-01
|
||||
9.828000000000e-10 -1.221122328152e-02
|
||||
9.928000000000e-10 1.390717643268e-01
|
||||
1.000000000000e-09 2.142511381663e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 0
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: tt
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-37-39/parameters/Frequency/run_0
|
||||
temperature: '27'
|
||||
vdd: '1.2'
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
run,time,vo_diff,frequency
|
||||
run_0,"[1.628e-10, 1.728e-10, 1.828e-10, …]","[-3.388e-01, -1.852e-01, -4.985e-03, …]",4.722
|
||||
|
|
|
@ -0,0 +1,5 @@
|
|||
# Simulation Summary for Freq
|
||||
|
||||
| run | time | vo_diff | frequency |
|
||||
| :-- | ---: | ------: | --------: |
|
||||
| run_0 | [1.628e-10, 1.728e-10, 1.828e-10, …] | [-3.388e-01, -1.852e-01, -4.985e-03, …] | 4.722 |
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
|
||||
# CACE Summary for CML_divider
|
||||
|
||||
**netlist source**: schematic
|
||||
|
||||
| Parameter | Tool | Result | Min Limit | Min Value | Typ Target | Typ Value | Max Limit | Max Value | Status |
|
||||
| :------------------- | :------------------- | :-------------- | ---------: | -----------: | ---------: | -----------: | ---------: | -----------: | :------: |
|
||||
| Freq | ngspice | frequency | | | | 0.000 GHz | | | Pass ✅ |
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata CACE\{simpath\}/CACE\{filename\}_CACE\{N\}.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib CACE\{PDK_ROOT\}/CACE\{PDK\}/libs.tech/ngspice/models/cornerMOSlv.lib mos_CACE\{corner\}
|
||||
|
||||
.include CACE\{DUT_path\}
|
||||
|
||||
.temp CACE\{temperature\}
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=CACE\{vdd\} savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 145 KiB |
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_00/CML_core_tb_0.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_tt
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp -40
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=0.8 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -3.110742996065e-01
|
||||
1.728000000000e-10 -1.869505717284e-01
|
||||
1.828000000000e-10 -3.563037101706e-02
|
||||
1.928000000000e-10 1.056708524540e-01
|
||||
2.028000000000e-10 2.100393804445e-01
|
||||
2.128000000000e-10 2.784249297688e-01
|
||||
2.228000000000e-10 3.224310579067e-01
|
||||
2.328000000000e-10 3.548600651170e-01
|
||||
2.428000000000e-10 3.792482005271e-01
|
||||
2.528000000000e-10 3.740820324036e-01
|
||||
2.628000000000e-10 3.079440308227e-01
|
||||
2.728000000000e-10 1.813826171807e-01
|
||||
2.828000000000e-10 2.923027813912e-02
|
||||
2.928000000000e-10 -1.118282325615e-01
|
||||
3.028000000000e-10 -2.157337068367e-01
|
||||
3.128000000000e-10 -2.829033176767e-01
|
||||
3.228000000000e-10 -3.260714502323e-01
|
||||
3.328000000000e-10 -3.577361248183e-01
|
||||
3.428000000000e-10 -3.819104006606e-01
|
||||
3.528000000000e-10 -3.764730474160e-01
|
||||
3.628000000000e-10 -3.102968359246e-01
|
||||
3.728000000000e-10 -1.832608913655e-01
|
||||
3.828000000000e-10 -3.084931437320e-02
|
||||
3.928000000000e-10 1.106163095990e-01
|
||||
4.028000000000e-10 2.145714971977e-01
|
||||
4.128000000000e-10 2.819937231053e-01
|
||||
4.228000000000e-10 3.251740998910e-01
|
||||
4.328000000000e-10 3.570946969464e-01
|
||||
4.428000000000e-10 3.813004444382e-01
|
||||
4.528000000000e-10 3.761230596147e-01
|
||||
4.628000000000e-10 3.099646053412e-01
|
||||
4.728000000000e-10 1.831473345022e-01
|
||||
4.828000000000e-10 3.069401022130e-02
|
||||
4.928000000000e-10 -1.106258411343e-01
|
||||
5.028000000000e-10 -2.146793601179e-01
|
||||
5.128000000000e-10 -2.820035552799e-01
|
||||
5.228000000000e-10 -3.252909243829e-01
|
||||
5.328000000000e-10 -3.570986338553e-01
|
||||
5.428000000000e-10 -3.813904658256e-01
|
||||
5.528000000000e-10 -3.760889514061e-01
|
||||
5.628000000000e-10 -3.100114096943e-01
|
||||
5.728000000000e-10 -1.830827247194e-01
|
||||
5.828000000000e-10 -3.072480545922e-02
|
||||
5.928000000000e-10 1.106906463094e-01
|
||||
6.028000000000e-10 2.146493837568e-01
|
||||
6.128000000000e-10 2.820610673881e-01
|
||||
6.228000000000e-10 3.252525482967e-01
|
||||
6.328000000000e-10 3.571504708749e-01
|
||||
6.428000000000e-10 3.813516648295e-01
|
||||
6.528000000000e-10 3.761390656738e-01
|
||||
6.628000000000e-10 3.099742259389e-01
|
||||
6.728000000000e-10 1.831331110808e-01
|
||||
6.828000000000e-10 3.068765829312e-02
|
||||
6.928000000000e-10 -1.106445812930e-01
|
||||
7.028000000000e-10 -2.146859050297e-01
|
||||
7.128000000000e-10 -2.820172231683e-01
|
||||
7.228000000000e-10 -3.252905125649e-01
|
||||
7.328000000000e-10 -3.571078709926e-01
|
||||
7.428000000000e-10 -3.813893177320e-01
|
||||
7.528000000000e-10 -3.760986555866e-01
|
||||
7.628000000000e-10 -3.100117776476e-01
|
||||
7.728000000000e-10 -1.830935153198e-01
|
||||
7.828000000000e-10 -3.072484475908e-02
|
||||
7.928000000000e-10 1.106810594907e-01
|
||||
8.028000000000e-10 2.146507312123e-01
|
||||
8.128000000000e-10 2.820530370402e-01
|
||||
8.228000000000e-10 3.252547871433e-01
|
||||
8.328000000000e-10 3.571432636036e-01
|
||||
8.428000000000e-10 3.813547544577e-01
|
||||
8.528000000000e-10 3.761324372121e-01
|
||||
8.628000000000e-10 3.099775475493e-01
|
||||
8.728000000000e-10 1.831274535707e-01
|
||||
8.828000000000e-10 3.069175078476e-02
|
||||
8.928000000000e-10 -1.106491559136e-01
|
||||
9.028000000000e-10 -2.146821655528e-01
|
||||
9.128000000000e-10 -2.820218639330e-01
|
||||
9.228000000000e-10 -3.252864642203e-01
|
||||
9.328000000000e-10 -3.571122611941e-01
|
||||
9.428000000000e-10 -3.813854215351e-01
|
||||
9.528000000000e-10 -3.761024723822e-01
|
||||
9.628000000000e-10 -3.100075395903e-01
|
||||
9.728000000000e-10 -1.830975404653e-01
|
||||
9.828000000000e-10 -3.072097080048e-02
|
||||
9.928000000000e-10 1.106770531472e-01
|
||||
1.000000000000e-09 1.895325033433e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 0
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: tt
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_00
|
||||
temperature: '-40'
|
||||
vdd: '0.8'
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_01/CML_core_tb_1.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_ss
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp -40
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=0.8 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -3.162797108708e-01
|
||||
1.728000000000e-10 -1.875883768906e-01
|
||||
1.828000000000e-10 -3.217177564589e-02
|
||||
1.928000000000e-10 1.118453904517e-01
|
||||
2.028000000000e-10 2.178869753922e-01
|
||||
2.128000000000e-10 2.869187499571e-01
|
||||
2.228000000000e-10 3.311831063176e-01
|
||||
2.328000000000e-10 3.637965093552e-01
|
||||
2.428000000000e-10 3.884475585753e-01
|
||||
2.528000000000e-10 3.831703446637e-01
|
||||
2.628000000000e-10 3.149426000366e-01
|
||||
2.728000000000e-10 1.840825734866e-01
|
||||
2.828000000000e-10 2.786370536806e-02
|
||||
2.928000000000e-10 -1.159899232258e-01
|
||||
3.028000000000e-10 -2.217323928122e-01
|
||||
3.128000000000e-10 -2.897841810826e-01
|
||||
3.228000000000e-10 -3.334256487170e-01
|
||||
3.328000000000e-10 -3.654508602495e-01
|
||||
3.428000000000e-10 -3.900407544937e-01
|
||||
3.528000000000e-10 -3.846189534315e-01
|
||||
3.628000000000e-10 -3.164922452622e-01
|
||||
3.728000000000e-10 -1.853182634851e-01
|
||||
3.828000000000e-10 -2.898615964086e-02
|
||||
3.928000000000e-10 1.151710782521e-01
|
||||
4.028000000000e-10 2.209054309263e-01
|
||||
4.128000000000e-10 2.891817322742e-01
|
||||
4.228000000000e-10 3.328077516782e-01
|
||||
4.328000000000e-10 3.650515838921e-01
|
||||
4.428000000000e-10 3.896233583948e-01
|
||||
4.528000000000e-10 3.844074302627e-01
|
||||
4.628000000000e-10 3.162448842688e-01
|
||||
4.728000000000e-10 1.852475068120e-01
|
||||
4.828000000000e-10 2.884623360652e-02
|
||||
4.928000000000e-10 -1.151788252337e-01
|
||||
5.028000000000e-10 -2.210147130581e-01
|
||||
5.128000000000e-10 -2.891872658193e-01
|
||||
5.228000000000e-10 -3.329167168088e-01
|
||||
5.328000000000e-10 -3.650471930963e-01
|
||||
5.428000000000e-10 -3.897100874545e-01
|
||||
5.528000000000e-10 -3.843762306477e-01
|
||||
5.628000000000e-10 -3.163013912188e-01
|
||||
5.728000000000e-10 -1.851950213487e-01
|
||||
5.828000000000e-10 -2.889036873678e-02
|
||||
5.928000000000e-10 1.152312899162e-01
|
||||
6.028000000000e-10 2.209735588305e-01
|
||||
6.128000000000e-10 2.892357416511e-01
|
||||
6.228000000000e-10 3.328707955285e-01
|
||||
6.328000000000e-10 3.650931065031e-01
|
||||
6.428000000000e-10 3.896657987149e-01
|
||||
6.528000000000e-10 3.844215105032e-01
|
||||
6.628000000000e-10 3.162596917265e-01
|
||||
6.728000000000e-10 1.852417351036e-01
|
||||
6.828000000000e-10 2.884992827621e-02
|
||||
6.928000000000e-10 -1.151876679011e-01
|
||||
7.028000000000e-10 -2.210123101756e-01
|
||||
7.128000000000e-10 -2.891938845816e-01
|
||||
7.228000000000e-10 -3.329106389600e-01
|
||||
7.328000000000e-10 -3.650518039465e-01
|
||||
7.428000000000e-10 -3.897047407363e-01
|
||||
7.528000000000e-10 -3.843819858648e-01
|
||||
7.628000000000e-10 -3.162978744015e-01
|
||||
7.728000000000e-10 -1.852023753321e-01
|
||||
7.828000000000e-10 -2.888743165850e-02
|
||||
7.928000000000e-10 1.152240030808e-01
|
||||
8.028000000000e-10 2.209771419031e-01
|
||||
8.128000000000e-10 2.892295361788e-01
|
||||
8.228000000000e-10 3.328747680971e-01
|
||||
8.328000000000e-10 3.650871456099e-01
|
||||
8.428000000000e-10 3.896701175780e-01
|
||||
8.528000000000e-10 3.844156912621e-01
|
||||
8.628000000000e-10 3.162637401476e-01
|
||||
8.728000000000e-10 1.852363586492e-01
|
||||
8.828000000000e-10 2.885434112124e-02
|
||||
8.928000000000e-10 -1.151920978903e-01
|
||||
9.028000000000e-10 -2.210084087345e-01
|
||||
9.128000000000e-10 -2.891984388712e-01
|
||||
9.228000000000e-10 -3.329064027155e-01
|
||||
9.328000000000e-10 -3.650560988894e-01
|
||||
9.428000000000e-10 -3.897007143418e-01
|
||||
9.528000000000e-10 -3.843858173814e-01
|
||||
9.628000000000e-10 -3.162935974835e-01
|
||||
9.728000000000e-10 -1.852064424274e-01
|
||||
9.828000000000e-10 -2.888350905479e-02
|
||||
9.928000000000e-10 1.152199079204e-01
|
||||
1.000000000000e-09 1.954791142410e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 1
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: ss
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_01
|
||||
temperature: '-40'
|
||||
vdd: '0.8'
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_02/CML_core_tb_2.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_tt
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp 27
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=0.8 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -2.914571027454e-01
|
||||
1.728000000000e-10 -1.780117263272e-01
|
||||
1.828000000000e-10 -3.802564096594e-02
|
||||
1.928000000000e-10 9.479025580261e-02
|
||||
2.028000000000e-10 1.961220444980e-01
|
||||
2.128000000000e-10 2.643669322964e-01
|
||||
2.228000000000e-10 3.071498875260e-01
|
||||
2.328000000000e-10 3.351667250191e-01
|
||||
2.428000000000e-10 3.529478733093e-01
|
||||
2.528000000000e-10 3.439767079911e-01
|
||||
2.628000000000e-10 2.827109934029e-01
|
||||
2.728000000000e-10 1.683025534555e-01
|
||||
2.828000000000e-10 2.843266655337e-02
|
||||
2.928000000000e-10 -1.036223502576e-01
|
||||
3.028000000000e-10 -2.042863713809e-01
|
||||
3.128000000000e-10 -2.713818104821e-01
|
||||
3.228000000000e-10 -3.132717880322e-01
|
||||
3.328000000000e-10 -3.402903477971e-01
|
||||
3.428000000000e-10 -3.574262556597e-01
|
||||
3.528000000000e-10 -3.476240566503e-01
|
||||
3.628000000000e-10 -2.857203755187e-01
|
||||
3.728000000000e-10 -1.703849236420e-01
|
||||
3.828000000000e-10 -2.994825869373e-02
|
||||
3.928000000000e-10 1.026817167876e-01
|
||||
4.028000000000e-10 2.034750084544e-01
|
||||
4.128000000000e-10 2.707812081585e-01
|
||||
4.228000000000e-10 3.126503625184e-01
|
||||
4.328000000000e-10 3.399043734480e-01
|
||||
4.428000000000e-10 3.571021595385e-01
|
||||
4.528000000000e-10 3.475896983741e-01
|
||||
4.628000000000e-10 2.857411927694e-01
|
||||
4.728000000000e-10 1.706053611761e-01
|
||||
4.828000000000e-10 3.010795594348e-02
|
||||
4.928000000000e-10 -1.024135388755e-01
|
||||
5.028000000000e-10 -2.033190471438e-01
|
||||
5.128000000000e-10 -2.705615444577e-01
|
||||
5.228000000000e-10 -3.125558523975e-01
|
||||
5.328000000000e-10 -3.397330193449e-01
|
||||
5.428000000000e-10 -3.570354300338e-01
|
||||
5.528000000000e-10 -3.474353611027e-01
|
||||
5.628000000000e-10 -2.856876769732e-01
|
||||
5.728000000000e-10 -1.704760895977e-01
|
||||
5.828000000000e-10 -3.008641427314e-02
|
||||
5.928000000000e-10 1.025087996136e-01
|
||||
6.028000000000e-10 2.033209986443e-01
|
||||
6.128000000000e-10 2.706412375819e-01
|
||||
6.228000000000e-10 3.125457575810e-01
|
||||
6.328000000000e-10 3.398008382665e-01
|
||||
6.428000000000e-10 3.570145583479e-01
|
||||
6.528000000000e-10 3.474888598072e-01
|
||||
6.628000000000e-10 2.856551852535e-01
|
||||
6.728000000000e-10 1.705188293935e-01
|
||||
6.828000000000e-10 3.004736925580e-02
|
||||
6.928000000000e-10 -1.024728514478e-01
|
||||
7.028000000000e-10 -2.033602328622e-01
|
||||
7.128000000000e-10 -2.706061106716e-01
|
||||
7.228000000000e-10 -3.125843283316e-01
|
||||
7.328000000000e-10 -3.397655433228e-01
|
||||
7.428000000000e-10 -3.570523646632e-01
|
||||
7.528000000000e-10 -3.474554820929e-01
|
||||
7.628000000000e-10 -2.856929985560e-01
|
||||
7.728000000000e-10 -1.704859799650e-01
|
||||
7.828000000000e-10 -3.008383757896e-02
|
||||
7.928000000000e-10 1.025039608177e-01
|
||||
8.028000000000e-10 2.033261442763e-01
|
||||
8.128000000000e-10 2.706371082838e-01
|
||||
8.228000000000e-10 3.125504649737e-01
|
||||
8.328000000000e-10 3.397966066528e-01
|
||||
8.428000000000e-10 3.570198965640e-01
|
||||
8.528000000000e-10 3.474857187206e-01
|
||||
8.628000000000e-10 2.856614378232e-01
|
||||
8.728000000000e-10 1.705164607562e-01
|
||||
8.828000000000e-10 3.005354621749e-02
|
||||
8.928000000000e-10 -1.024749769036e-01
|
||||
9.028000000000e-10 -2.033548454455e-01
|
||||
9.128000000000e-10 -2.706087008930e-01
|
||||
9.228000000000e-10 -3.125792630790e-01
|
||||
9.328000000000e-10 -3.397683901773e-01
|
||||
9.428000000000e-10 -3.570478314069e-01
|
||||
9.528000000000e-10 -3.474583427153e-01
|
||||
9.628000000000e-10 -2.856887110961e-01
|
||||
9.728000000000e-10 -1.704892548593e-01
|
||||
9.828000000000e-10 -3.008001356704e-02
|
||||
9.928000000000e-10 1.025005080892e-01
|
||||
1.000000000000e-09 1.786649040194e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 2
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: tt
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_02
|
||||
temperature: '27'
|
||||
vdd: '0.8'
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_03/CML_core_tb_3.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_ss
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp 27
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=0.8 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -2.958574299710e-01
|
||||
1.728000000000e-10 -1.791897212785e-01
|
||||
1.828000000000e-10 -3.599075048614e-02
|
||||
1.928000000000e-10 9.946703268478e-02
|
||||
2.028000000000e-10 2.032502871016e-01
|
||||
2.128000000000e-10 2.733994094958e-01
|
||||
2.228000000000e-10 3.172845988123e-01
|
||||
2.328000000000e-10 3.455609123691e-01
|
||||
2.428000000000e-10 3.630923957132e-01
|
||||
2.528000000000e-10 3.534419450967e-01
|
||||
2.628000000000e-10 2.903663934708e-01
|
||||
2.728000000000e-10 1.726743312860e-01
|
||||
2.828000000000e-10 2.930291139472e-02
|
||||
2.928000000000e-10 -1.057514312075e-01
|
||||
3.028000000000e-10 -2.091913834589e-01
|
||||
3.128000000000e-10 -2.784696434768e-01
|
||||
3.228000000000e-10 -3.216873931074e-01
|
||||
3.328000000000e-10 -3.491870426412e-01
|
||||
3.428000000000e-10 -3.662894191498e-01
|
||||
3.528000000000e-10 -3.560374131806e-01
|
||||
3.628000000000e-10 -2.925719059469e-01
|
||||
3.728000000000e-10 -1.742159787839e-01
|
||||
3.828000000000e-10 -3.049391935212e-02
|
||||
3.928000000000e-10 1.049756016137e-01
|
||||
4.028000000000e-10 2.084672065617e-01
|
||||
4.128000000000e-10 2.779301238417e-01
|
||||
4.228000000000e-10 3.211180618030e-01
|
||||
4.328000000000e-10 3.488255023686e-01
|
||||
4.428000000000e-10 3.659572542624e-01
|
||||
4.528000000000e-10 3.559493947967e-01
|
||||
4.628000000000e-10 2.925058094407e-01
|
||||
4.728000000000e-10 1.743267017008e-01
|
||||
4.828000000000e-10 3.054314172764e-02
|
||||
4.928000000000e-10 -1.048175245910e-01
|
||||
5.028000000000e-10 -2.084096499031e-01
|
||||
5.128000000000e-10 -2.777998408986e-01
|
||||
5.228000000000e-10 -3.210985617265e-01
|
||||
5.328000000000e-10 -3.487226120056e-01
|
||||
5.428000000000e-10 -3.659481451181e-01
|
||||
5.528000000000e-10 -3.558482598240e-01
|
||||
5.628000000000e-10 -2.924942070749e-01
|
||||
5.728000000000e-10 -1.742324941843e-01
|
||||
5.828000000000e-10 -3.054486718364e-02
|
||||
5.928000000000e-10 1.048934295445e-01
|
||||
6.028000000000e-10 2.083991544976e-01
|
||||
6.128000000000e-10 2.778660140822e-01
|
||||
6.228000000000e-10 3.210794561497e-01
|
||||
6.328000000000e-10 3.487805773205e-01
|
||||
6.428000000000e-10 3.659226785140e-01
|
||||
6.528000000000e-10 3.558970058340e-01
|
||||
6.628000000000e-10 2.924624137185e-01
|
||||
6.728000000000e-10 1.742748110039e-01
|
||||
6.828000000000e-10 3.050920657876e-02
|
||||
6.928000000000e-10 -1.048562048812e-01
|
||||
7.028000000000e-10 -2.084343791218e-01
|
||||
7.128000000000e-10 -2.778299623633e-01
|
||||
7.228000000000e-10 -3.211147582115e-01
|
||||
7.328000000000e-10 -3.487447461690e-01
|
||||
7.428000000000e-10 -3.659575085549e-01
|
||||
7.528000000000e-10 -3.558632428052e-01
|
||||
7.628000000000e-10 -2.924972481137e-01
|
||||
7.728000000000e-10 -1.742418088753e-01
|
||||
7.828000000000e-10 -3.054328720193e-02
|
||||
7.928000000000e-10 1.048870377838e-01
|
||||
8.028000000000e-10 2.084024115537e-01
|
||||
8.128000000000e-10 2.778603942564e-01
|
||||
8.228000000000e-10 3.210827582845e-01
|
||||
8.328000000000e-10 3.487751488045e-01
|
||||
8.428000000000e-10 3.659266824704e-01
|
||||
8.528000000000e-10 3.558925702991e-01
|
||||
8.628000000000e-10 2.924671830422e-01
|
||||
8.728000000000e-10 1.742711856894e-01
|
||||
8.828000000000e-10 3.051417003050e-02
|
||||
8.928000000000e-10 -1.048591994973e-01
|
||||
9.028000000000e-10 -2.084299430076e-01
|
||||
9.128000000000e-10 -2.778331783696e-01
|
||||
9.228000000000e-10 -3.211104359655e-01
|
||||
9.328000000000e-10 -3.487480244246e-01
|
||||
9.428000000000e-10 -3.659535267111e-01
|
||||
9.528000000000e-10 -3.558663548813e-01
|
||||
9.628000000000e-10 -2.924933270906e-01
|
||||
9.728000000000e-10 -1.742451324195e-01
|
||||
9.828000000000e-10 -3.053963678018e-02
|
||||
9.928000000000e-10 1.048836196344e-01
|
||||
1.000000000000e-09 1.830293824662e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 3
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: ss
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_03
|
||||
temperature: '27'
|
||||
vdd: '0.8'
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_04/CML_core_tb_4.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_tt
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp 80
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=0.8 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -2.689355033953e-01
|
||||
1.728000000000e-10 -1.691728954892e-01
|
||||
1.828000000000e-10 -4.423302134033e-02
|
||||
1.928000000000e-10 7.663444207075e-02
|
||||
2.028000000000e-10 1.714764750752e-01
|
||||
2.128000000000e-10 2.368219567798e-01
|
||||
2.228000000000e-10 2.772768132445e-01
|
||||
2.328000000000e-10 3.013675537348e-01
|
||||
2.428000000000e-10 3.140706479520e-01
|
||||
2.528000000000e-10 3.038549886105e-01
|
||||
2.628000000000e-10 2.508404086347e-01
|
||||
2.728000000000e-10 1.528360605683e-01
|
||||
2.828000000000e-10 3.040034809293e-02
|
||||
2.928000000000e-10 -8.785381094258e-02
|
||||
3.028000000000e-10 -1.808734961109e-01
|
||||
3.128000000000e-10 -2.445795528199e-01
|
||||
3.228000000000e-10 -2.838354337528e-01
|
||||
3.328000000000e-10 -3.065800962400e-01
|
||||
3.428000000000e-10 -3.181767360109e-01
|
||||
3.528000000000e-10 -3.065752663659e-01
|
||||
3.628000000000e-10 -2.523878800401e-01
|
||||
3.728000000000e-10 -1.531173668737e-01
|
||||
3.828000000000e-10 -2.992055538556e-02
|
||||
3.928000000000e-10 8.900435641641e-02
|
||||
4.028000000000e-10 1.821756238512e-01
|
||||
4.128000000000e-10 2.460123650690e-01
|
||||
4.228000000000e-10 2.851182310100e-01
|
||||
4.328000000000e-10 3.079291995556e-01
|
||||
4.428000000000e-10 3.194129911462e-01
|
||||
4.528000000000e-10 3.078915366323e-01
|
||||
4.628000000000e-10 2.535144344421e-01
|
||||
4.728000000000e-10 1.541542026196e-01
|
||||
4.828000000000e-10 3.063651583090e-02
|
||||
4.928000000000e-10 -8.839161491074e-02
|
||||
5.028000000000e-10 -1.817999659778e-01
|
||||
5.128000000000e-10 -2.456456661989e-01
|
||||
5.228000000000e-10 -2.849195350591e-01
|
||||
5.328000000000e-10 -3.077091828990e-01
|
||||
5.428000000000e-10 -3.193505374448e-01
|
||||
5.528000000000e-10 -3.078081521678e-01
|
||||
5.628000000000e-10 -2.535787813503e-01
|
||||
5.728000000000e-10 -1.541764927596e-01
|
||||
5.828000000000e-10 -3.077048554081e-02
|
||||
5.928000000000e-10 8.832790620553e-02
|
||||
6.028000000000e-10 1.816551916875e-01
|
||||
6.128000000000e-10 2.455879975104e-01
|
||||
6.228000000000e-10 2.847911932982e-01
|
||||
6.328000000000e-10 3.076677363016e-01
|
||||
6.428000000000e-10 3.192371229053e-01
|
||||
6.528000000000e-10 3.077778412262e-01
|
||||
6.628000000000e-10 2.534819327505e-01
|
||||
6.728000000000e-10 1.541683138663e-01
|
||||
6.828000000000e-10 3.070155435378e-02
|
||||
6.928000000000e-10 -8.831320560130e-02
|
||||
7.028000000000e-10 -1.817038543937e-01
|
||||
7.128000000000e-10 -2.455619958387e-01
|
||||
7.228000000000e-10 -2.848320347671e-01
|
||||
7.328000000000e-10 -3.076358698550e-01
|
||||
7.428000000000e-10 -3.192710667609e-01
|
||||
7.528000000000e-10 -3.077409972388e-01
|
||||
7.628000000000e-10 -2.535098012890e-01
|
||||
7.728000000000e-10 -1.541282589474e-01
|
||||
7.828000000000e-10 -3.072672689244e-02
|
||||
7.928000000000e-10 8.835148526653e-02
|
||||
8.028000000000e-10 1.816795669555e-01
|
||||
8.128000000000e-10 2.455984246601e-01
|
||||
8.228000000000e-10 2.848062931006e-01
|
||||
8.328000000000e-10 3.076705916890e-01
|
||||
8.428000000000e-10 3.192450073559e-01
|
||||
8.528000000000e-10 3.077736319697e-01
|
||||
8.628000000000e-10 2.534831121829e-01
|
||||
8.728000000000e-10 1.541590953584e-01
|
||||
8.828000000000e-10 3.069946612700e-02
|
||||
8.928000000000e-10 -8.832341199891e-02
|
||||
9.028000000000e-10 -1.817063952021e-01
|
||||
9.128000000000e-10 -2.455714256322e-01
|
||||
9.228000000000e-10 -2.848333922463e-01
|
||||
9.328000000000e-10 -3.076440936715e-01
|
||||
9.428000000000e-10 -3.192716274515e-01
|
||||
9.528000000000e-10 -3.077481608676e-01
|
||||
9.628000000000e-10 -2.535093614867e-01
|
||||
9.728000000000e-10 -1.541340765567e-01
|
||||
9.828000000000e-10 -3.072486745089e-02
|
||||
9.928000000000e-10 8.834711873249e-02
|
||||
1.000000000000e-09 1.586239577417e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 4
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: tt
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_04
|
||||
temperature: '80'
|
||||
vdd: '0.8'
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_05/CML_core_tb_5.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_ss
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp 80
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=0.8 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -2.722799425151e-01
|
||||
1.728000000000e-10 -1.701277707773e-01
|
||||
1.828000000000e-10 -4.252496989706e-02
|
||||
1.928000000000e-10 8.092536896213e-02
|
||||
2.028000000000e-10 1.785199933375e-01
|
||||
2.128000000000e-10 2.463984181452e-01
|
||||
2.228000000000e-10 2.885755113271e-01
|
||||
2.328000000000e-10 3.131967480955e-01
|
||||
2.428000000000e-10 3.255285716483e-01
|
||||
2.528000000000e-10 3.143820454109e-01
|
||||
2.628000000000e-10 2.595824958850e-01
|
||||
2.728000000000e-10 1.585585813323e-01
|
||||
2.828000000000e-10 3.254606172598e-02
|
||||
2.928000000000e-10 -8.921916265210e-02
|
||||
3.028000000000e-10 -1.857143058967e-01
|
||||
3.128000000000e-10 -2.524588707093e-01
|
||||
3.228000000000e-10 -2.937876617757e-01
|
||||
3.328000000000e-10 -3.173655773168e-01
|
||||
3.428000000000e-10 -3.288566343508e-01
|
||||
3.528000000000e-10 -3.166123605828e-01
|
||||
3.628000000000e-10 -2.609360611345e-01
|
||||
3.728000000000e-10 -1.589355414621e-01
|
||||
3.828000000000e-10 -3.237621747627e-02
|
||||
3.928000000000e-10 8.990939637816e-02
|
||||
4.028000000000e-10 1.864994737191e-01
|
||||
4.128000000000e-10 2.533636311879e-01
|
||||
4.228000000000e-10 2.945633129641e-01
|
||||
4.328000000000e-10 3.182197832362e-01
|
||||
4.428000000000e-10 3.296245618008e-01
|
||||
4.528000000000e-10 3.174841059207e-01
|
||||
4.628000000000e-10 2.616780558587e-01
|
||||
4.728000000000e-10 1.596622360522e-01
|
||||
4.828000000000e-10 3.287681921596e-02
|
||||
4.928000000000e-10 -8.943999963453e-02
|
||||
5.028000000000e-10 -1.862066308093e-01
|
||||
5.128000000000e-10 -2.530527908612e-01
|
||||
5.228000000000e-10 -2.943931136832e-01
|
||||
5.328000000000e-10 -3.180152021024e-01
|
||||
5.428000000000e-10 -3.295545667130e-01
|
||||
5.528000000000e-10 -3.173812952412e-01
|
||||
5.628000000000e-10 -2.617027726155e-01
|
||||
5.728000000000e-10 -1.596411992093e-01
|
||||
5.828000000000e-10 -3.295895028258e-02
|
||||
5.928000000000e-10 8.942267434718e-02
|
||||
6.028000000000e-10 1.861105403656e-01
|
||||
6.128000000000e-10 2.530344325895e-01
|
||||
6.228000000000e-10 2.943051008579e-01
|
||||
6.328000000000e-10 3.180051485103e-01
|
||||
6.428000000000e-10 3.294737915539e-01
|
||||
6.528000000000e-10 3.173744791022e-01
|
||||
6.628000000000e-10 2.616291881364e-01
|
||||
6.728000000000e-10 1.596450333001e-01
|
||||
6.828000000000e-10 3.290088244348e-02
|
||||
6.928000000000e-10 -8.940659470005e-02
|
||||
7.028000000000e-10 -1.861562133447e-01
|
||||
7.128000000000e-10 -2.530116656482e-01
|
||||
7.228000000000e-10 -2.943454309811e-01
|
||||
7.328000000000e-10 -3.179780561670e-01
|
||||
7.428000000000e-10 -3.295087969733e-01
|
||||
7.528000000000e-10 -3.173438661274e-01
|
||||
7.628000000000e-10 -2.616591955397e-01
|
||||
7.728000000000e-10 -1.596115565426e-01
|
||||
7.828000000000e-10 -3.292790237402e-02
|
||||
7.928000000000e-10 8.943927261705e-02
|
||||
8.028000000000e-10 1.861310420114e-01
|
||||
8.128000000000e-10 2.530433655174e-01
|
||||
8.228000000000e-10 2.943195630770e-01
|
||||
8.328000000000e-10 3.180088285378e-01
|
||||
8.428000000000e-10 3.294832118435e-01
|
||||
8.528000000000e-10 3.173732295072e-01
|
||||
8.628000000000e-10 2.616337486722e-01
|
||||
8.728000000000e-10 1.596399004289e-01
|
||||
8.828000000000e-10 3.290244884503e-02
|
||||
8.928000000000e-10 -8.941301350766e-02
|
||||
9.028000000000e-10 -1.861557185261e-01
|
||||
9.128000000000e-10 -2.530180139920e-01
|
||||
9.228000000000e-10 -2.943444772306e-01
|
||||
9.328000000000e-10 -3.179838696148e-01
|
||||
9.428000000000e-10 -3.295076633013e-01
|
||||
9.528000000000e-10 -3.173492560727e-01
|
||||
9.628000000000e-10 -2.616577755083e-01
|
||||
9.728000000000e-10 -1.596163947717e-01
|
||||
9.828000000000e-10 -3.292583900074e-02
|
||||
9.928000000000e-10 8.943518431692e-02
|
||||
1.000000000000e-09 1.621529465729e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 5
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: ss
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_05
|
||||
temperature: '80'
|
||||
vdd: '0.8'
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_06/CML_core_tb_6.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_tt
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp -40
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=1.2 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -3.622644182692e-01
|
||||
1.728000000000e-10 -1.962653738736e-01
|
||||
1.828000000000e-10 -5.712895575235e-03
|
||||
1.928000000000e-10 1.510345047594e-01
|
||||
2.028000000000e-10 2.432775412534e-01
|
||||
2.128000000000e-10 2.772000132926e-01
|
||||
2.228000000000e-10 3.161630086256e-01
|
||||
2.328000000000e-10 3.654121904616e-01
|
||||
2.428000000000e-10 4.070200809677e-01
|
||||
2.528000000000e-10 4.211809118313e-01
|
||||
2.628000000000e-10 3.552666659990e-01
|
||||
2.728000000000e-10 1.954111420719e-01
|
||||
2.828000000000e-10 7.499275151763e-03
|
||||
2.928000000000e-10 -1.488912332472e-01
|
||||
3.028000000000e-10 -2.420325529570e-01
|
||||
3.128000000000e-10 -2.768171400503e-01
|
||||
3.228000000000e-10 -3.164103191401e-01
|
||||
3.328000000000e-10 -3.656815561297e-01
|
||||
3.428000000000e-10 -4.072561733660e-01
|
||||
3.528000000000e-10 -4.210637971044e-01
|
||||
3.628000000000e-10 -3.548415521036e-01
|
||||
3.728000000000e-10 -1.946286859654e-01
|
||||
3.828000000000e-10 -6.746438981043e-03
|
||||
3.928000000000e-10 1.496127957227e-01
|
||||
4.028000000000e-10 2.425057762271e-01
|
||||
4.128000000000e-10 2.772590268750e-01
|
||||
4.228000000000e-10 3.167075169816e-01
|
||||
4.328000000000e-10 3.660182242119e-01
|
||||
4.428000000000e-10 4.074726111052e-01
|
||||
4.528000000000e-10 4.212975956202e-01
|
||||
4.628000000000e-10 3.549573822535e-01
|
||||
4.728000000000e-10 1.947835560361e-01
|
||||
4.828000000000e-10 6.801482567115e-03
|
||||
4.928000000000e-10 -1.495086456760e-01
|
||||
5.028000000000e-10 -2.424863730465e-01
|
||||
5.128000000000e-10 -2.771744431737e-01
|
||||
5.228000000000e-10 -3.166940000076e-01
|
||||
5.328000000000e-10 -3.659398771497e-01
|
||||
5.428000000000e-10 -4.074689465730e-01
|
||||
5.528000000000e-10 -4.212394549000e-01
|
||||
5.628000000000e-10 -3.549741510035e-01
|
||||
5.728000000000e-10 -1.947436351784e-01
|
||||
5.828000000000e-10 -6.830080160870e-03
|
||||
5.928000000000e-10 1.495407150967e-01
|
||||
6.028000000000e-10 2.424570295697e-01
|
||||
6.128000000000e-10 2.772066160972e-01
|
||||
6.228000000000e-10 3.166654934082e-01
|
||||
6.328000000000e-10 3.659723864247e-01
|
||||
6.428000000000e-10 4.074416211051e-01
|
||||
6.528000000000e-10 4.212697301261e-01
|
||||
6.628000000000e-10 3.549467093259e-01
|
||||
6.728000000000e-10 1.947718238583e-01
|
||||
6.828000000000e-10 6.800951177238e-03
|
||||
6.928000000000e-10 -1.495148390529e-01
|
||||
7.028000000000e-10 -2.424852043575e-01
|
||||
7.128000000000e-10 -2.771809105751e-01
|
||||
7.228000000000e-10 -3.166930947909e-01
|
||||
7.328000000000e-10 -3.659459016360e-01
|
||||
7.428000000000e-10 -4.074677461547e-01
|
||||
7.528000000000e-10 -4.212442717757e-01
|
||||
7.628000000000e-10 -3.549717520551e-01
|
||||
7.728000000000e-10 -1.947463263521e-01
|
||||
7.828000000000e-10 -6.825916545420e-03
|
||||
7.928000000000e-10 1.495385751436e-01
|
||||
8.028000000000e-10 2.424609931904e-01
|
||||
8.128000000000e-10 2.772040406871e-01
|
||||
8.228000000000e-10 3.166687905139e-01
|
||||
8.328000000000e-10 3.659694951712e-01
|
||||
8.428000000000e-10 4.074447010218e-01
|
||||
8.528000000000e-10 4.212671408417e-01
|
||||
8.628000000000e-10 3.549498827484e-01
|
||||
8.728000000000e-10 1.947689363825e-01
|
||||
8.828000000000e-10 6.803756635994e-03
|
||||
8.928000000000e-10 -1.495176738691e-01
|
||||
9.028000000000e-10 -2.424825342063e-01
|
||||
9.128000000000e-10 -2.771836734306e-01
|
||||
9.228000000000e-10 -3.166902103892e-01
|
||||
9.328000000000e-10 -3.659485359213e-01
|
||||
9.428000000000e-10 -4.074650210911e-01
|
||||
9.528000000000e-10 -4.212469657833e-01
|
||||
9.628000000000e-10 -3.549694058275e-01
|
||||
9.728000000000e-10 -1.947487958951e-01
|
||||
9.828000000000e-10 -6.823236278537e-03
|
||||
9.928000000000e-10 1.495363177485e-01
|
||||
1.000000000000e-09 2.250264100511e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 6
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: tt
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_06
|
||||
temperature: '-40'
|
||||
vdd: '1.2'
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_07/CML_core_tb_7.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_ss
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp -40
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=1.2 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -3.668500025046e-01
|
||||
1.728000000000e-10 -1.978704758130e-01
|
||||
1.828000000000e-10 -3.069550951996e-03
|
||||
1.928000000000e-10 1.561389387989e-01
|
||||
2.028000000000e-10 2.488697408913e-01
|
||||
2.128000000000e-10 2.833379270136e-01
|
||||
2.228000000000e-10 3.221467647695e-01
|
||||
2.328000000000e-10 3.723176028273e-01
|
||||
2.428000000000e-10 4.147931582649e-01
|
||||
2.528000000000e-10 4.286646301121e-01
|
||||
2.628000000000e-10 3.614677855799e-01
|
||||
2.728000000000e-10 1.982726052647e-01
|
||||
2.828000000000e-10 5.580533140739e-03
|
||||
2.928000000000e-10 -1.536551403474e-01
|
||||
3.028000000000e-10 -2.474729097395e-01
|
||||
3.128000000000e-10 -2.827981749211e-01
|
||||
3.228000000000e-10 -3.222400643179e-01
|
||||
3.328000000000e-10 -3.724510578191e-01
|
||||
3.428000000000e-10 -4.149487937489e-01
|
||||
3.528000000000e-10 -4.285094572794e-01
|
||||
3.628000000000e-10 -3.610716711123e-01
|
||||
3.728000000000e-10 -1.975613483211e-01
|
||||
3.828000000000e-10 -4.936396792217e-03
|
||||
3.928000000000e-10 1.542720670721e-01
|
||||
4.028000000000e-10 2.478554934965e-01
|
||||
4.128000000000e-10 2.831768205427e-01
|
||||
4.228000000000e-10 3.224764565266e-01
|
||||
4.328000000000e-10 3.727376628527e-01
|
||||
4.428000000000e-10 4.151128450004e-01
|
||||
4.528000000000e-10 4.287030398326e-01
|
||||
4.628000000000e-10 3.611465460996e-01
|
||||
4.728000000000e-10 1.976871290976e-01
|
||||
4.828000000000e-10 4.962067120498e-03
|
||||
4.928000000000e-10 -1.541857483448e-01
|
||||
5.028000000000e-10 -2.478549856990e-01
|
||||
5.128000000000e-10 -2.831031432303e-01
|
||||
5.228000000000e-10 -3.224786212940e-01
|
||||
5.328000000000e-10 -3.726675199031e-01
|
||||
5.428000000000e-10 -4.151222726988e-01
|
||||
5.528000000000e-10 -4.286496175832e-01
|
||||
5.628000000000e-10 -3.611719348809e-01
|
||||
5.728000000000e-10 -1.976471175954e-01
|
||||
5.828000000000e-10 -4.995016715658e-03
|
||||
5.928000000000e-10 1.542195273485e-01
|
||||
6.028000000000e-10 2.478226151197e-01
|
||||
6.128000000000e-10 2.831371441394e-01
|
||||
6.228000000000e-10 3.224465270882e-01
|
||||
6.328000000000e-10 3.727020829784e-01
|
||||
6.428000000000e-10 4.150919188021e-01
|
||||
6.528000000000e-10 4.286821395136e-01
|
||||
6.628000000000e-10 3.611419365066e-01
|
||||
6.728000000000e-10 1.976777927703e-01
|
||||
6.828000000000e-10 4.963507878799e-03
|
||||
6.928000000000e-10 -1.541913949207e-01
|
||||
7.028000000000e-10 -2.478529800499e-01
|
||||
7.128000000000e-10 -2.831092109235e-01
|
||||
7.228000000000e-10 -3.224762894768e-01
|
||||
7.328000000000e-10 -3.726728668334e-01
|
||||
7.428000000000e-10 -4.151201370880e-01
|
||||
7.528000000000e-10 -4.286543531433e-01
|
||||
7.628000000000e-10 -3.611692599178e-01
|
||||
7.728000000000e-10 -1.976499135935e-01
|
||||
7.828000000000e-10 -4.990471824028e-03
|
||||
7.928000000000e-10 1.542171227717e-01
|
||||
8.028000000000e-10 2.478269854332e-01
|
||||
8.128000000000e-10 2.831343470853e-01
|
||||
8.228000000000e-10 3.224500362551e-01
|
||||
8.328000000000e-10 3.726987138014e-01
|
||||
8.428000000000e-10 4.150953468135e-01
|
||||
8.528000000000e-10 4.286792233560e-01
|
||||
8.628000000000e-10 3.611455588852e-01
|
||||
8.728000000000e-10 1.976743961081e-01
|
||||
8.828000000000e-10 4.966432661841e-03
|
||||
8.928000000000e-10 -1.541946484524e-01
|
||||
9.028000000000e-10 -2.478502288236e-01
|
||||
9.128000000000e-10 -2.831123474050e-01
|
||||
9.228000000000e-10 -3.224731331421e-01
|
||||
9.328000000000e-10 -3.726757720747e-01
|
||||
9.428000000000e-10 -4.151172388981e-01
|
||||
9.528000000000e-10 -4.286573581279e-01
|
||||
9.628000000000e-10 -3.611667698498e-01
|
||||
9.728000000000e-10 -1.976525646923e-01
|
||||
9.828000000000e-10 -4.987471597641e-03
|
||||
9.928000000000e-10 1.542147143463e-01
|
||||
1.000000000000e-09 2.301006397866e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 7
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: ss
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_07
|
||||
temperature: '-40'
|
||||
vdd: '1.2'
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_08/CML_core_tb_8.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_tt
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp 27
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=1.2 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -3.388323931118e-01
|
||||
1.728000000000e-10 -1.851651732117e-01
|
||||
1.828000000000e-10 -4.985209728467e-03
|
||||
1.928000000000e-10 1.464303664236e-01
|
||||
2.028000000000e-10 2.390890865534e-01
|
||||
2.128000000000e-10 2.778147857521e-01
|
||||
2.228000000000e-10 3.140298283994e-01
|
||||
2.328000000000e-10 3.564486269316e-01
|
||||
2.428000000000e-10 3.920777300126e-01
|
||||
2.528000000000e-10 4.026431485981e-01
|
||||
2.628000000000e-10 3.407818057760e-01
|
||||
2.728000000000e-10 1.919413521399e-01
|
||||
2.828000000000e-10 1.380608162301e-02
|
||||
2.928000000000e-10 -1.377275777470e-01
|
||||
3.028000000000e-10 -2.320727525709e-01
|
||||
3.128000000000e-10 -2.723718882130e-01
|
||||
3.228000000000e-10 -3.097195919600e-01
|
||||
3.328000000000e-10 -3.525356430610e-01
|
||||
3.428000000000e-10 -3.885938438581e-01
|
||||
3.528000000000e-10 -3.995683250409e-01
|
||||
3.628000000000e-10 -3.382392747069e-01
|
||||
3.728000000000e-10 -1.897685835172e-01
|
||||
3.828000000000e-10 -1.211190537496e-02
|
||||
3.928000000000e-10 1.391365825109e-01
|
||||
4.028000000000e-10 2.331433172305e-01
|
||||
4.128000000000e-10 2.733678679410e-01
|
||||
4.228000000000e-10 3.105714733021e-01
|
||||
4.328000000000e-10 3.533708758772e-01
|
||||
4.428000000000e-10 3.892622592719e-01
|
||||
4.528000000000e-10 4.001272859757e-01
|
||||
4.628000000000e-10 3.385642563623e-01
|
||||
4.728000000000e-10 1.899916781684e-01
|
||||
4.828000000000e-10 1.218033620775e-02
|
||||
4.928000000000e-10 -1.390656421002e-01
|
||||
5.028000000000e-10 -2.331398693887e-01
|
||||
5.128000000000e-10 -2.733037181082e-01
|
||||
5.228000000000e-10 -3.105518491305e-01
|
||||
5.328000000000e-10 -3.533032068815e-01
|
||||
5.428000000000e-10 -3.892531494066e-01
|
||||
5.528000000000e-10 -4.000849100741e-01
|
||||
5.628000000000e-10 -3.385845178207e-01
|
||||
5.728000000000e-10 -1.899774211598e-01
|
||||
5.828000000000e-10 -1.221996984529e-02
|
||||
5.928000000000e-10 1.390720456320e-01
|
||||
6.028000000000e-10 2.331027694491e-01
|
||||
6.128000000000e-10 2.733156842718e-01
|
||||
6.228000000000e-10 3.105197170718e-01
|
||||
6.328000000000e-10 3.533171034352e-01
|
||||
6.428000000000e-10 3.892243222051e-01
|
||||
6.528000000000e-10 4.000997182403e-01
|
||||
6.628000000000e-10 3.385594083538e-01
|
||||
6.728000000000e-10 1.899934277570e-01
|
||||
6.828000000000e-10 1.219466050150e-02
|
||||
6.928000000000e-10 -1.390553921853e-01
|
||||
7.028000000000e-10 -2.331263672195e-01
|
||||
7.128000000000e-10 -2.732987102222e-01
|
||||
7.228000000000e-10 -3.105421090081e-01
|
||||
7.328000000000e-10 -3.532994962925e-01
|
||||
7.428000000000e-10 -3.892451651423e-01
|
||||
7.528000000000e-10 -4.000824543639e-01
|
||||
7.628000000000e-10 -3.385783830881e-01
|
||||
7.728000000000e-10 -1.899748483052e-01
|
||||
7.828000000000e-10 -1.221334688082e-02
|
||||
7.928000000000e-10 1.390733351530e-01
|
||||
8.028000000000e-10 2.331082732353e-01
|
||||
8.128000000000e-10 2.733160005972e-01
|
||||
8.228000000000e-10 3.105237742784e-01
|
||||
8.328000000000e-10 3.533165556732e-01
|
||||
8.428000000000e-10 3.892279285214e-01
|
||||
8.528000000000e-10 4.000991009611e-01
|
||||
8.628000000000e-10 3.385625511294e-01
|
||||
8.728000000000e-10 1.899914169425e-01
|
||||
8.828000000000e-10 1.219669858142e-02
|
||||
8.928000000000e-10 -1.390576717936e-01
|
||||
9.028000000000e-10 -2.331245304799e-01
|
||||
9.128000000000e-10 -2.733009677599e-01
|
||||
9.228000000000e-10 -3.105397739050e-01
|
||||
9.328000000000e-10 -3.533012749995e-01
|
||||
9.428000000000e-10 -3.892430673555e-01
|
||||
9.528000000000e-10 -4.000844420176e-01
|
||||
9.628000000000e-10 -3.385768441038e-01
|
||||
9.728000000000e-10 -1.899764612955e-01
|
||||
9.828000000000e-10 -1.221122328152e-02
|
||||
9.928000000000e-10 1.390717643268e-01
|
||||
1.000000000000e-09 2.142511381663e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 8
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: tt
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_08
|
||||
temperature: '27'
|
||||
vdd: '1.2'
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_09/CML_core_tb_9.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_ss
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp 27
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=1.2 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -3.445927026449e-01
|
||||
1.728000000000e-10 -1.889320969581e-01
|
||||
1.828000000000e-10 -5.355234564888e-03
|
||||
1.928000000000e-10 1.489911128277e-01
|
||||
2.028000000000e-10 2.434822449071e-01
|
||||
2.128000000000e-10 2.838702060450e-01
|
||||
2.228000000000e-10 3.202156401988e-01
|
||||
2.328000000000e-10 3.629401474789e-01
|
||||
2.428000000000e-10 3.990998051164e-01
|
||||
2.528000000000e-10 4.099063275401e-01
|
||||
2.628000000000e-10 3.477923521709e-01
|
||||
2.728000000000e-10 1.968519788675e-01
|
||||
2.828000000000e-10 1.493750763318e-02
|
||||
2.928000000000e-10 -1.398437743336e-01
|
||||
3.028000000000e-10 -2.362338093992e-01
|
||||
3.128000000000e-10 -2.782887085314e-01
|
||||
3.228000000000e-10 -3.158910292643e-01
|
||||
3.328000000000e-10 -3.590893499920e-01
|
||||
3.428000000000e-10 -3.957248346768e-01
|
||||
3.528000000000e-10 -4.069627998073e-01
|
||||
3.628000000000e-10 -3.454070734708e-01
|
||||
3.728000000000e-10 -1.948243362004e-01
|
||||
3.828000000000e-10 -1.337926088934e-02
|
||||
3.928000000000e-10 1.411472162204e-01
|
||||
4.028000000000e-10 2.372231231196e-01
|
||||
4.128000000000e-10 2.792284454069e-01
|
||||
4.228000000000e-10 3.166817589057e-01
|
||||
4.328000000000e-10 3.598702175634e-01
|
||||
4.428000000000e-10 3.963375250752e-01
|
||||
4.528000000000e-10 4.074753309124e-01
|
||||
4.628000000000e-10 3.456854225481e-01
|
||||
4.728000000000e-10 1.950177434222e-01
|
||||
4.828000000000e-10 1.342430394201e-02
|
||||
4.928000000000e-10 -1.410850608466e-01
|
||||
5.028000000000e-10 -2.372286880899e-01
|
||||
5.128000000000e-10 -2.791659662153e-01
|
||||
5.228000000000e-10 -3.166689293508e-01
|
||||
5.328000000000e-10 -3.598026374101e-01
|
||||
5.428000000000e-10 -3.963331138013e-01
|
||||
5.528000000000e-10 -4.074316676804e-01
|
||||
5.628000000000e-10 -3.457088001737e-01
|
||||
5.728000000000e-10 -1.950000158899e-01
|
||||
5.828000000000e-10 -1.346504722293e-02
|
||||
5.928000000000e-10 1.410957635246e-01
|
||||
6.028000000000e-10 2.371909425038e-01
|
||||
6.128000000000e-10 2.791817404178e-01
|
||||
6.228000000000e-10 3.166356138828e-01
|
||||
6.328000000000e-10 3.598203377806e-01
|
||||
6.428000000000e-10 3.963033609435e-01
|
||||
6.528000000000e-10 4.074499160221e-01
|
||||
6.628000000000e-10 3.456826167292e-01
|
||||
6.728000000000e-10 1.950190841630e-01
|
||||
6.828000000000e-10 1.343803454206e-02
|
||||
6.928000000000e-10 -1.410764950259e-01
|
||||
7.028000000000e-10 -2.372163265848e-01
|
||||
7.128000000000e-10 -2.791624229651e-01
|
||||
7.228000000000e-10 -3.166599225368e-01
|
||||
7.328000000000e-10 -3.598002455584e-01
|
||||
7.428000000000e-10 -3.963259615583e-01
|
||||
7.528000000000e-10 -4.074304662079e-01
|
||||
7.628000000000e-10 -3.457033629648e-01
|
||||
7.728000000000e-10 -1.949983704767e-01
|
||||
7.828000000000e-10 -1.345872104163e-02
|
||||
7.928000000000e-10 1.410962716693e-01
|
||||
8.028000000000e-10 2.371963808526e-01
|
||||
8.128000000000e-10 2.791814500218e-01
|
||||
8.228000000000e-10 3.166396456569e-01
|
||||
8.328000000000e-10 3.598191409746e-01
|
||||
8.428000000000e-10 3.963069790813e-01
|
||||
8.528000000000e-10 4.074488078929e-01
|
||||
8.628000000000e-10 3.456858987705e-01
|
||||
8.728000000000e-10 1.950166421641e-01
|
||||
8.828000000000e-10 1.344025602045e-02
|
||||
8.928000000000e-10 -1.410790665154e-01
|
||||
9.028000000000e-10 -2.372142995262e-01
|
||||
9.128000000000e-10 -2.791649325552e-01
|
||||
9.228000000000e-10 -3.166573514474e-01
|
||||
9.328000000000e-10 -3.598022359716e-01
|
||||
9.428000000000e-10 -3.963236588924e-01
|
||||
9.528000000000e-10 -4.074326778223e-01
|
||||
9.628000000000e-10 -3.457016440453e-01
|
||||
9.728000000000e-10 -1.950001702792e-01
|
||||
9.828000000000e-10 -1.345633761364e-02
|
||||
9.928000000000e-10 1.410945129066e-01
|
||||
1.000000000000e-09 2.176807579100e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 9
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: ss
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_09
|
||||
temperature: '27'
|
||||
vdd: '1.2'
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_10/CML_core_tb_10.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_tt
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp 80
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=1.2 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -2.831577979118e-01
|
||||
1.728000000000e-10 -1.548331321524e-01
|
||||
1.828000000000e-10 2.954507991941e-03
|
||||
1.928000000000e-10 1.412083661187e-01
|
||||
2.028000000000e-10 2.303947789211e-01
|
||||
2.128000000000e-10 2.725788032239e-01
|
||||
2.228000000000e-10 3.064646814943e-01
|
||||
2.328000000000e-10 3.412898568956e-01
|
||||
2.428000000000e-10 3.692979025942e-01
|
||||
2.528000000000e-10 3.751979264520e-01
|
||||
2.628000000000e-10 3.186495551608e-01
|
||||
2.728000000000e-10 1.849115684226e-01
|
||||
2.828000000000e-10 2.146912258403e-02
|
||||
2.928000000000e-10 -1.215319416200e-01
|
||||
3.028000000000e-10 -2.147336364713e-01
|
||||
3.128000000000e-10 -2.593628319189e-01
|
||||
3.228000000000e-10 -2.947919001104e-01
|
||||
3.328000000000e-10 -3.306034656465e-01
|
||||
3.428000000000e-10 -3.598903423599e-01
|
||||
3.528000000000e-10 -3.674806029527e-01
|
||||
3.628000000000e-10 -3.131864519443e-01
|
||||
3.728000000000e-10 -1.816607205648e-01
|
||||
3.828000000000e-10 -2.002885045896e-02
|
||||
3.928000000000e-10 1.219326732879e-01
|
||||
4.028000000000e-10 2.146583452252e-01
|
||||
4.128000000000e-10 2.593288859790e-01
|
||||
4.228000000000e-10 2.947836961551e-01
|
||||
4.328000000000e-10 3.305873089453e-01
|
||||
4.428000000000e-10 3.597520160348e-01
|
||||
4.528000000000e-10 3.672634041173e-01
|
||||
4.628000000000e-10 3.128292575731e-01
|
||||
4.728000000000e-10 1.812525079401e-01
|
||||
4.828000000000e-10 1.956255085056e-02
|
||||
4.928000000000e-10 -1.223539241893e-01
|
||||
5.028000000000e-10 -2.150587893921e-01
|
||||
5.128000000000e-10 -2.596440912838e-01
|
||||
5.228000000000e-10 -2.950896959018e-01
|
||||
5.328000000000e-10 -3.308452440946e-01
|
||||
5.428000000000e-10 -3.600168265621e-01
|
||||
5.528000000000e-10 -3.674687038170e-01
|
||||
5.628000000000e-10 -3.130140501398e-01
|
||||
5.728000000000e-10 -1.813584327872e-01
|
||||
5.828000000000e-10 -1.965159115909e-02
|
||||
5.928000000000e-10 1.223212864923e-01
|
||||
6.028000000000e-10 2.150157103205e-01
|
||||
6.128000000000e-10 2.596318060931e-01
|
||||
6.228000000000e-10 2.950524078153e-01
|
||||
6.328000000000e-10 3.308363963911e-01
|
||||
6.428000000000e-10 3.599874022300e-01
|
||||
6.528000000000e-10 3.674690181116e-01
|
||||
6.628000000000e-10 3.129980588961e-01
|
||||
6.728000000000e-10 1.813712653368e-01
|
||||
6.828000000000e-10 1.964491680526e-02
|
||||
6.928000000000e-10 -1.223023112353e-01
|
||||
7.028000000000e-10 -2.150202483004e-01
|
||||
7.128000000000e-10 -2.596144309164e-01
|
||||
7.228000000000e-10 -2.950582886643e-01
|
||||
7.328000000000e-10 -3.308199600200e-01
|
||||
7.428000000000e-10 -3.599931640339e-01
|
||||
7.528000000000e-10 -3.674538095645e-01
|
||||
7.628000000000e-10 -3.130042913922e-01
|
||||
7.728000000000e-10 -1.813570925598e-01
|
||||
7.828000000000e-10 -1.965290666609e-02
|
||||
7.928000000000e-10 1.223145971689e-01
|
||||
8.028000000000e-10 2.150114430495e-01
|
||||
8.128000000000e-10 2.596256780136e-01
|
||||
8.228000000000e-10 2.950490452158e-01
|
||||
8.328000000000e-10 3.308307530718e-01
|
||||
8.428000000000e-10 3.599842799802e-01
|
||||
8.528000000000e-10 3.674639698479e-01
|
||||
8.628000000000e-10 3.129957925611e-01
|
||||
8.728000000000e-10 1.813666711568e-01
|
||||
8.828000000000e-10 1.964348030724e-02
|
||||
8.928000000000e-10 -1.223056361887e-01
|
||||
9.028000000000e-10 -2.150207890100e-01
|
||||
9.128000000000e-10 -2.596171721225e-01
|
||||
9.228000000000e-10 -2.950581404305e-01
|
||||
9.328000000000e-10 -3.308221104591e-01
|
||||
9.428000000000e-10 -3.599929167296e-01
|
||||
9.528000000000e-10 -3.674557320782e-01
|
||||
9.628000000000e-10 -3.130039671541e-01
|
||||
9.728000000000e-10 -1.813582011282e-01
|
||||
9.828000000000e-10 -1.965175786777e-02
|
||||
9.928000000000e-10 1.223137237372e-01
|
||||
1.000000000000e-09 1.953703252853e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 10
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: tt
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_10
|
||||
temperature: '80'
|
||||
vdd: '1.2'
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_11/CML_core_tb_11.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_ss
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp 80
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=1.2 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -2.857852225245e-01
|
||||
1.728000000000e-10 -1.572533595452e-01
|
||||
1.828000000000e-10 2.540381659783e-03
|
||||
1.928000000000e-10 1.434374080790e-01
|
||||
2.028000000000e-10 2.351272809546e-01
|
||||
2.128000000000e-10 2.797956268783e-01
|
||||
2.228000000000e-10 3.144243918962e-01
|
||||
2.328000000000e-10 3.493618787392e-01
|
||||
2.428000000000e-10 3.773715695689e-01
|
||||
2.528000000000e-10 3.831823569325e-01
|
||||
2.628000000000e-10 3.264482498061e-01
|
||||
2.728000000000e-10 1.910530045686e-01
|
||||
2.828000000000e-10 2.436059711742e-02
|
||||
2.928000000000e-10 -1.220220612332e-01
|
||||
3.028000000000e-10 -2.180809390746e-01
|
||||
3.128000000000e-10 -2.653775774444e-01
|
||||
3.228000000000e-10 -3.017848824321e-01
|
||||
3.328000000000e-10 -3.379021858146e-01
|
||||
3.428000000000e-10 -3.673696540777e-01
|
||||
3.528000000000e-10 -3.751149757425e-01
|
||||
3.628000000000e-10 -3.209083740174e-01
|
||||
3.728000000000e-10 -1.878979131572e-01
|
||||
3.828000000000e-10 -2.307531260616e-02
|
||||
3.928000000000e-10 1.222703025101e-01
|
||||
4.028000000000e-10 2.179003509445e-01
|
||||
4.128000000000e-10 2.652908784701e-01
|
||||
4.228000000000e-10 3.017672646237e-01
|
||||
4.328000000000e-10 3.378931599738e-01
|
||||
4.428000000000e-10 3.672390198172e-01
|
||||
4.528000000000e-10 3.748903812400e-01
|
||||
4.628000000000e-10 3.205316331029e-01
|
||||
4.728000000000e-10 1.874647700937e-01
|
||||
4.828000000000e-10 2.258819957166e-02
|
||||
4.928000000000e-10 -1.227112688171e-01
|
||||
5.028000000000e-10 -2.183172764214e-01
|
||||
5.128000000000e-10 -2.656203742551e-01
|
||||
5.228000000000e-10 -3.020800906145e-01
|
||||
5.328000000000e-10 -3.381553362553e-01
|
||||
5.428000000000e-10 -3.675051891202e-01
|
||||
5.528000000000e-10 -3.750972240389e-01
|
||||
5.628000000000e-10 -3.207148935088e-01
|
||||
5.728000000000e-10 -1.875700292984e-01
|
||||
5.828000000000e-10 -2.267596999196e-02
|
||||
5.928000000000e-10 1.226776663562e-01
|
||||
6.028000000000e-10 2.182733434309e-01
|
||||
6.128000000000e-10 2.656053081095e-01
|
||||
6.228000000000e-10 3.020411985396e-01
|
||||
6.328000000000e-10 3.381435634392e-01
|
||||
6.428000000000e-10 3.674743818406e-01
|
||||
6.528000000000e-10 3.750952532513e-01
|
||||
6.628000000000e-10 3.206986438750e-01
|
||||
6.728000000000e-10 1.875816736609e-01
|
||||
6.828000000000e-10 2.266940437016e-02
|
||||
6.928000000000e-10 -1.226596158426e-01
|
||||
7.028000000000e-10 -2.182776851932e-01
|
||||
7.128000000000e-10 -2.655888997029e-01
|
||||
7.228000000000e-10 -3.020470638059e-01
|
||||
7.328000000000e-10 -3.381282771084e-01
|
||||
7.428000000000e-10 -3.674800981492e-01
|
||||
7.528000000000e-10 -3.750811166601e-01
|
||||
7.628000000000e-10 -3.207046174850e-01
|
||||
7.728000000000e-10 -1.875682790354e-01
|
||||
7.828000000000e-10 -2.267703281628e-02
|
||||
7.928000000000e-10 1.226713327530e-01
|
||||
8.028000000000e-10 2.182693863135e-01
|
||||
8.128000000000e-10 2.655996099454e-01
|
||||
8.228000000000e-10 3.020383466326e-01
|
||||
8.328000000000e-10 3.381385294735e-01
|
||||
8.428000000000e-10 3.674717742910e-01
|
||||
8.528000000000e-10 3.750907045119e-01
|
||||
8.628000000000e-10 3.206966644115e-01
|
||||
8.728000000000e-10 1.875773616331e-01
|
||||
8.828000000000e-10 2.266807684955e-02
|
||||
8.928000000000e-10 -1.226628120211e-01
|
||||
9.028000000000e-10 -2.182782381400e-01
|
||||
9.128000000000e-10 -2.655915506047e-01
|
||||
9.228000000000e-10 -3.020469590318e-01
|
||||
9.328000000000e-10 -3.381303351991e-01
|
||||
9.428000000000e-10 -3.674798958779e-01
|
||||
9.528000000000e-10 -3.750829516380e-01
|
||||
9.628000000000e-10 -3.207043265993e-01
|
||||
9.728000000000e-10 -1.875693454762e-01
|
||||
9.828000000000e-10 -2.267594148777e-02
|
||||
9.928000000000e-10 1.226704651969e-01
|
||||
1.000000000000e-09 1.977257563344e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 11
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: ss
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_11
|
||||
temperature: '80'
|
||||
vdd: '1.2'
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_12/CML_core_tb_12.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_tt
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp -40
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=1.6 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
1.628000000000e-10 -3.213526702696e-01
|
||||
1.728000000000e-10 -1.557909441213e-01
|
||||
1.828000000000e-10 3.476956205809e-02
|
||||
1.928000000000e-10 1.811250151598e-01
|
||||
2.028000000000e-10 2.596166993269e-01
|
||||
2.128000000000e-10 2.853727091731e-01
|
||||
2.228000000000e-10 3.254453264627e-01
|
||||
2.328000000000e-10 3.792799604087e-01
|
||||
2.428000000000e-10 4.176388066249e-01
|
||||
2.528000000000e-10 4.205544301124e-01
|
||||
2.628000000000e-10 3.463528198985e-01
|
||||
2.728000000000e-10 1.792096076204e-01
|
||||
2.828000000000e-10 -1.442396833933e-02
|
||||
2.928000000000e-10 -1.649237711275e-01
|
||||
3.028000000000e-10 -2.471596975948e-01
|
||||
3.128000000000e-10 -2.748735614517e-01
|
||||
3.228000000000e-10 -3.160128767795e-01
|
||||
3.328000000000e-10 -3.707930594343e-01
|
||||
3.428000000000e-10 -4.104823651943e-01
|
||||
3.528000000000e-10 -4.153692056047e-01
|
||||
3.628000000000e-10 -3.427931169871e-01
|
||||
3.728000000000e-10 -1.769552164151e-01
|
||||
3.828000000000e-10 1.590673093360e-02
|
||||
3.928000000000e-10 1.658834812043e-01
|
||||
4.028000000000e-10 2.479775600913e-01
|
||||
4.128000000000e-10 2.756409688001e-01
|
||||
4.228000000000e-10 3.168596600790e-01
|
||||
4.328000000000e-10 3.715133147191e-01
|
||||
4.428000000000e-10 4.111218222953e-01
|
||||
4.528000000000e-10 4.157229971644e-01
|
||||
4.628000000000e-10 3.430019798682e-01
|
||||
4.728000000000e-10 1.769456026445e-01
|
||||
4.828000000000e-10 -1.592886494610e-02
|
||||
4.928000000000e-10 -1.659782283296e-01
|
||||
5.028000000000e-10 -2.479947853664e-01
|
||||
5.128000000000e-10 -2.756931315881e-01
|
||||
5.228000000000e-10 -3.168416717549e-01
|
||||
5.328000000000e-10 -3.715547211919e-01
|
||||
5.428000000000e-10 -4.111034138799e-01
|
||||
5.528000000000e-10 -4.157691346087e-01
|
||||
5.628000000000e-10 -3.429925568898e-01
|
||||
5.728000000000e-10 -1.770024985869e-01
|
||||
5.828000000000e-10 1.592938202906e-02
|
||||
5.928000000000e-10 1.659292038608e-01
|
||||
6.028000000000e-10 2.480043512000e-01
|
||||
6.128000000000e-10 2.756533285421e-01
|
||||
6.228000000000e-10 3.168576585763e-01
|
||||
6.328000000000e-10 3.715156583068e-01
|
||||
6.428000000000e-10 4.111207690964e-01
|
||||
6.528000000000e-10 4.157343976531e-01
|
||||
6.628000000000e-10 3.430135347581e-01
|
||||
6.728000000000e-10 1.769734665185e-01
|
||||
6.828000000000e-10 -1.590652763180e-02
|
||||
6.928000000000e-10 -1.659537152419e-01
|
||||
7.028000000000e-10 -2.479812550746e-01
|
||||
7.128000000000e-10 -2.756768834918e-01
|
||||
7.228000000000e-10 -3.168350969677e-01
|
||||
7.328000000000e-10 -3.715419152243e-01
|
||||
7.428000000000e-10 -4.110983779981e-01
|
||||
7.528000000000e-10 -4.157587194411e-01
|
||||
7.628000000000e-10 -3.429901444601e-01
|
||||
7.728000000000e-10 -1.769973775521e-01
|
||||
7.828000000000e-10 1.592723735432e-02
|
||||
7.928000000000e-10 1.659318535084e-01
|
||||
8.028000000000e-10 2.480017799848e-01
|
||||
8.128000000000e-10 2.756559811492e-01
|
||||
8.228000000000e-10 3.168566227283e-01
|
||||
8.328000000000e-10 3.715195500188e-01
|
||||
8.428000000000e-10 4.111190536097e-01
|
||||
8.528000000000e-10 4.157370668569e-01
|
||||
8.628000000000e-10 3.430103710665e-01
|
||||
8.728000000000e-10 1.769771675859e-01
|
||||
8.828000000000e-10 -1.590770493918e-02
|
||||
8.928000000000e-10 -1.659501582149e-01
|
||||
9.028000000000e-10 -2.479827571068e-01
|
||||
9.128000000000e-10 -2.756738772283e-01
|
||||
9.228000000000e-10 -3.168377001445e-01
|
||||
9.328000000000e-10 -3.715391180409e-01
|
||||
9.428000000000e-10 -4.111007797151e-01
|
||||
9.528000000000e-10 -4.157556639381e-01
|
||||
9.628000000000e-10 -3.429919881202e-01
|
||||
9.728000000000e-10 -1.769955652012e-01
|
||||
9.828000000000e-10 1.592430721908e-02
|
||||
9.928000000000e-10 1.659331850974e-01
|
||||
1.000000000000e-09 2.332140069758e-01
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -120 -20 -100 -20 {}
|
||||
L 4 -120 20 -100 20 {}
|
||||
L 4 100 -20 120 -20 {}
|
||||
L 4 100 20 120 20 {}
|
||||
L 7 0 -60 0 -40 {}
|
||||
L 7 0 40 0 60 {}
|
||||
B 5 -122.5 -22.5 -117.5 -17.5 {name=Vo+ dir=out}
|
||||
B 5 -122.5 17.5 -117.5 22.5 {name=Vo- dir=out}
|
||||
B 5 117.5 -22.5 122.5 -17.5 {name=Vi+ dir=in}
|
||||
B 5 117.5 17.5 122.5 22.5 {name=Vi- dir=in}
|
||||
B 5 -2.5 -62.5 2.5 -57.5 {name=vdd dir=inout}
|
||||
B 5 -2.5 57.5 2.5 62.5 {name=gnd dir=inout}
|
||||
P 4 5 100 -40 -100 -40 -100 40 100 40 100 -40 {}
|
||||
T {@symname} -44 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -52 0 0 0.2 0.2 {}
|
||||
T {Vo+} -95 -24 0 0 0.2 0.2 {}
|
||||
T {Vo-} -95 16 0 0 0.2 0.2 {}
|
||||
T {Vi+} 95 -16 2 0 0.2 0.2 {}
|
||||
T {Vi-} 95 24 2 0 0.2 0.2 {}
|
||||
T {vdd} 10 -39 0 1 0.2 0.2 {}
|
||||
T {gnd} -10 34 2 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
DUT_path: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
N: 12
|
||||
PDK: ihp-sg13g2
|
||||
PDK_ROOT: /home/pedersen/IHP-Open-PDK
|
||||
corner: tt
|
||||
filename: CML_core_tb
|
||||
simpath: /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_12
|
||||
temperature: '-40'
|
||||
vdd: '1.6'
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
* a custom spiceinit file for IHP-Open-PDK
|
||||
|
||||
* export PDK_ROOT and PDK environmental variables first and add it to your .bashrc
|
||||
* export PDK_ROOT= installation_specific_directory/IHP-Open-PDK
|
||||
* export PDK=ihp-sg13g2
|
||||
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/spice )
|
||||
setcs sourcepath = ( $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/spice )
|
||||
*echo $sourcepath
|
||||
|
||||
*option tnom=28
|
||||
*option list
|
||||
|
||||
* KLU solver still do not work correctly for every simulation
|
||||
*option klu
|
||||
|
||||
*option node
|
||||
*option opts
|
||||
*option warn=1
|
||||
*option maxwarns=10
|
||||
*option savecurrents
|
||||
|
||||
*set ngbehavior=hsa
|
||||
*set noinit
|
||||
|
||||
* add OSDI
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/psp103_nqs.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/r3_cmc.osdi'
|
||||
osdi '$PDK_ROOT/$PDK/libs.tech/ngspice/osdi/mosvar.osdi'
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
v {xschem version=3.4.6 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 740 -940 740 -920 {lab=GND}
|
||||
N 740 -1090 740 -1060 {lab=VDD}
|
||||
N 600 -1020 620 -1020 {lab=Vinplus}
|
||||
N 600 -980 620 -980 {lab=Vinminus}
|
||||
N 860 -1020 880 -1020 {lab=Voplus}
|
||||
N 860 -980 880 -980 {lab=Vominus}
|
||||
N 1150 -850 1150 -820 {lab=VDD}
|
||||
N 1150 -760 1150 -730 {lab=GND}
|
||||
N 930 -850 930 -820 {lab=Vinminus}
|
||||
N 930 -760 930 -730 {lab=GND}
|
||||
N 720 -850 720 -820 {lab=Vinplus}
|
||||
N 720 -760 720 -730 {lab=GND}
|
||||
C {code_shown.sym} 10 -1220 0 0 {name=transient_tb only_toplevel=false
|
||||
value="
|
||||
.ic V(Voplus)=1.2
|
||||
.control
|
||||
set noaskquit
|
||||
set numdgt=12
|
||||
|
||||
* Save & simulate
|
||||
save all
|
||||
op
|
||||
write CML_core_tb.raw
|
||||
set appendwrite
|
||||
tran 10p 1n 160p
|
||||
|
||||
* Explicit vectors
|
||||
let vo_p = v(Voplus)
|
||||
let vo_m = v(Vominus)
|
||||
let vo_diff = vo_p - vo_m
|
||||
|
||||
set wr_singlescale
|
||||
wrdata /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/runs/RUN_2025-11-11_17-38-36/parameters/Frequency/run_13/CML_core_tb_13.data vo_diff
|
||||
quit
|
||||
|
||||
.endc
|
||||
"}
|
||||
C {opin.sym} 880 -1020 2 1 {name=p6 lab=Voplus}
|
||||
C {opin.sym} 880 -980 0 0 {name=p9 lab=Vominus}
|
||||
C {devices/code_shown.sym} 10 -620 0 0 {name=SETUP only_toplevel=true
|
||||
format="tcleval( @value )"
|
||||
value="
|
||||
.lib /home/pedersen/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_ss
|
||||
|
||||
.include /home/pedersen/projects/IHP-AnalogAcademy/modules/module_4_type_2_PLL/CML_divider/xschem/simulations/schematic/CML_divider.spice
|
||||
|
||||
.temp -40
|
||||
"
|
||||
}
|
||||
C {iopin.sym} 740 -1090 0 1 {name=p2 lab=VDD}
|
||||
C {ipin.sym} 600 -1020 2 1 {name=p4 lab=Vinplus}
|
||||
C {ipin.sym} 600 -980 2 1 {name=p1 lab=Vinminus}
|
||||
C {CML_divider.sym} 740 -1000 0 1 {name=x1}
|
||||
C {vsource.sym} 1150 -790 0 0 {name=V1 value=1.6 savecurrent=false}
|
||||
C {gnd.sym} 1150 -730 0 0 {name=l2 lab=GND}
|
||||
C {lab_pin.sym} 1150 -850 0 0 {name=p5 sig_type=std_logic lab=VDD}
|
||||
C {gnd.sym} 930 -730 0 0 {name=l1 lab=GND}
|
||||
C {lab_pin.sym} 930 -850 0 0 {name=p8 sig_type=std_logic lab=Vinminus}
|
||||
C {vsource.sym} 720 -790 0 0 {name=V3 value="SIN(0.6 0.3 10G 0 0 0)" savecurrent=false}
|
||||
C {gnd.sym} 720 -730 0 0 {name=l4 lab=GND
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {lab_pin.sym} 720 -850 0 0 {name=p10 sig_type=std_logic lab=Vinplus
|
||||
value="dc 0 ac 0 SIN(0.6 0.3 12.7k 0 0 0)"}
|
||||
C {vsource.sym} 930 -790 0 0 {name=V2 value="SIN(0.6 0.3 10G 0 0 180)" savecurrent=false}
|
||||
C {gnd.sym} 740 -920 0 0 {name=l3 lab=GND}
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue