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luke / manta
Python 0 0
A configurable and approachable tool for FPGA debugging and rapid prototyping.
fpga verilog icestorm icestick debug xilinx
Updated 2026-03-29 05:44:03 +02:00
luke / sv2v
Haskell 0 0
SystemVerilog to Verilog conversion
verilog yosys systemverilog conversion
Updated 2026-03-27 23:46:29 +01:00
luke / ndk-fpga
0 0
Updated 2025-06-19 20:36:45 +02:00
luke / icestorm
Python 0 0
Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)
Updated 2025-06-03 14:40:39 +02:00