Created FPGA family feature matrix (markdown)

FPGA-family-feature-matrix.md

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+**WIP page**
+
+There is a growing number of FPGA families that have support in the open source tools, but not all FPGA families are fully complete. It can be hard to keep track of all the projects out there, and decide which family is right for your project.
+
+The table on this page aims to keep track of which FPGA primitives are supported by which project.
+
+| FPGA Family    | Gowin LittleBee |
+|----------------|-----------------|
+| Project        | Apicula         |
+| Logic Slice    | ✔️              |
+| ├ LUTRAM       | ❌              |
+| └ ALU          | ✔️              |
+| IO buffer      | ✔️              |
+| ├ IO standards | ✔️              |
+| └ DDR/SERDES   | ❌              |
+| Block RAM      | ❌              |
+| DSP            | ❌              |
+| PLL            | ❌              |
+| Routing        | ✔️              |
+| ├ Local        | ✔️              |
+| ├ Global       | ✔️              |
+| └ Long wires   | ❌              |