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mirror of https://github.com/YosysHQ/yosys.git synced 2026-10-07 02:23:09 +02:00
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fffe42d4c1dbfdf976ecb84e16a759552c8e2dd0
yosys/passes
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Eddie Hung 37f42fe102 Merge pull request #1845 from YosysHQ/eddie/kernel_speedup
kernel: speedup by using more pass-by-const-ref
2020-04-02 07:13:33 -07:00
..
cmds
Merge pull request #1845 from YosysHQ/eddie/kernel_speedup
2020-04-02 07:13:33 -07:00
equiv
xilinx: Add xilinx_dffopt pass (#1557)
2019-12-18 13:43:43 +01:00
fsm
fsm_extract: Initialize celltypes with full design.
2020-03-19 18:51:21 +01:00
hierarchy
Fix double deletion in passes/hierarchy/hierarchy.cc.
2020-03-30 16:43:54 +00:00
memory
Merge pull request #1845 from YosysHQ/eddie/kernel_speedup
2020-04-02 07:13:33 -07:00
opt
Merge pull request #1845 from YosysHQ/eddie/kernel_speedup
2020-04-02 07:13:33 -07:00
pmgen
Merge pull request #1657 from YosysHQ/dave/xilinx-dsp-multonly
2020-02-02 14:53:32 +00:00
proc
kernel: SigSpec use more const& + overloads to prevent implicit SigSpec
2020-03-13 08:17:39 -07:00
sat
Merge pull request #1845 from YosysHQ/eddie/kernel_speedup
2020-04-02 07:13:33 -07:00
techmap
Merge pull request #1845 from YosysHQ/eddie/kernel_speedup
2020-04-02 07:13:33 -07:00
tests
Document (* gentb_skip *) attr for test_autotb
2019-09-18 12:41:35 -07:00
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