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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-04 11:29:42 +02:00
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yosys/techlibs
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Emil J 992e64342c Merge pull request #5621 from rocallahan/remove-opt-sort
Remove `Design::sort()` calls from optimization passes
2026-02-04 16:55:56 +01:00
..
achronix
…
anlogic
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common
Move Design::sort() calls out of opt and opt_clean passes into the synth passes that need them.
2026-01-23 01:14:35 +00:00
coolrunner2
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easic
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efinix
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fabulous
Merge pull request #5315 from YosysHQ/emil/write_rtlil-no-sort
2025-09-22 11:14:39 +02:00
gatemate
Makefile: Add gatemate genfiles
2025-11-04 11:46:27 +13:00
gowin
Merge pull request #5621 from rocallahan/remove-opt-sort
2026-02-04 16:55:56 +01:00
greenpak4
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ice40
add ID::src to allowlist instead
2025-12-17 01:31:32 -08:00
intel
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intel_alm
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lattice
Add and use fix_mod.py
2026-01-28 07:45:58 +13:00
microchip
microchip: fix IdString memory leak
2025-11-13 14:10:52 +01:00
nanoxplore
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quicklogic
Remove .c_str() from parameters to log_debug()
2025-09-23 19:10:33 +12:00
sf2
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xilinx
Merge pull request #5621 from rocallahan/remove-opt-sort
2026-02-04 16:55:56 +01:00
.gitignore
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fix_mod.py
Add and use fix_mod.py
2026-01-28 07:45:58 +13:00
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