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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-03 11:18:31 +02:00
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fe64a714a9de0d3539ec2fdf06ee1ff1983fdea3
yosys/tests/arch
T
History
Krystine Sherwin ee73a91f44 Remove references to ilang
2024-11-05 12:36:31 +13:00
..
anlogic
Update tests
2023-06-09 14:41:45 +02:00
common
Adding double_sync_ram_tdp to blockram.v
2023-12-04 15:52:03 +01:00
ecp5
Remove references to ilang
2024-11-05 12:36:31 +13:00
efinix
efinix: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
fabulous
fabulous: Add support for mapping carry chains
2023-02-27 09:50:34 +01:00
gatemate
Update tests
2023-06-09 14:41:45 +02:00
gowin
ice40, ecp5, gowin: enable ABC9 by default
2023-11-13 15:28:13 +00:00
ice40
Remove references to ilang
2024-11-05 12:36:31 +13:00
intel_alm
intel_alm: drop quartus support
2024-05-03 11:32:33 +01:00
machxo2
put back previous test state, due to default change
2023-08-29 10:21:58 +02:00
microchip
inline all tests. Add switch to remove init values as PolarFire DFFs do not support init
2024-07-08 17:03:03 -04:00
nanoxplore
add min_ce_use and min_srst_use parameters
2024-08-15 17:50:36 +02:00
nexus
Update tests
2023-06-09 14:41:45 +02:00
quicklogic
quicklogic: Relax the LUT number test
2024-10-07 15:27:03 +02:00
xilinx
Remove references to ilang
2024-11-05 12:36:31 +13:00
run-test.sh
Enable SV for localparam use by Efinix cell_sim
2024-04-08 12:45:43 +02:00
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