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mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-29 01:24:25 +02:00
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fd7921776387a05edadcc90d1300670d49a73d68
yosys/techlibs
T
History
Marcelina Kościelnicka fd79217763 Add v2 memory cells.
2021-08-11 13:34:10 +02:00
..
achronix
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
anlogic
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
common
Add v2 memory cells.
2021-08-11 13:34:10 +02:00
coolrunner2
Blackbox all whiteboxes after synthesis
2021-03-17 21:07:20 +00:00
easic
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
ecp5
ecp5: Add DCSC blackbox
2021-07-06 14:07:20 +01:00
efinix
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
gowin
Use HTTPS for website links, gatecat email
2021-06-09 12:16:56 +02:00
greenpak4
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
ice40
opt_lut: Allow more than one -dlogic per cell type.
2021-07-29 17:30:07 +02:00
intel
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
intel_alm
Fix files with CRLF line endings
2021-06-09 12:16:33 +02:00
machxo2
Blackbox all whiteboxes after synthesis
2021-03-17 21:07:20 +00:00
nexus
Use HTTPS for website links, gatecat email
2021-06-09 12:16:56 +02:00
quicklogic
quicklogic: ABC9 synthesis
2021-04-17 20:54:58 +02:00
sf2
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
xilinx
Fixes xc7 BRAM36s
2021-07-30 16:17:22 +02:00
.gitignore
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