yosys/tests/simple
Clifford Wolf 9b183539af Implemented dynamic bit-/part-select for memory writes 2014-07-17 16:49:23 +02:00
..
.gitignore
aes_kexp128.v
always01.v
always02.v
always03.v
arraycells.v added tests for new verilog features 2014-06-07 12:26:11 +02:00
arrays01.v
carryadd.v Bugfix in name resolution with generate blocks 2014-01-30 15:01:28 +01:00
constpower.v Fixed handling of power operator 2013-11-07 22:20:00 +01:00
dff_different_styles.v Added support for complex set-reset flip-flops in proc_dff 2013-10-24 16:54:05 +02:00
fiedler-cooley.v
forgen01.v Progress in Verific bindings 2014-03-17 01:56:00 +01:00
forgen02.v
fsm.v
generate.v Various improvements in support for generate statements 2013-12-04 21:06:54 +01:00
hierarchy.v Implemented correct handling of signed module parameters 2013-11-24 17:17:21 +01:00
i2c_master_tests.v
loops.v
macros.v fixed parsing of constant with comment between size and value 2014-07-02 06:27:04 +02:00
mem2reg.v Added test case for AstNode::MEM2REG_FL_CMPLX_LHS 2014-06-17 21:49:59 +02:00
mem_arst.v Progress in Verific bindings 2014-03-17 01:56:00 +01:00
memory.v Implemented dynamic bit-/part-select for memory writes 2014-07-17 16:49:23 +02:00
multiplier.v Added multiplier test case from eda playground 2013-12-18 13:43:53 +01:00
muxtree.v Fixed parsing of default cases when not last case 2013-11-18 16:10:50 +01:00
omsp_dbg_uart.v
operators.v Added support for "2**n" shifter encoding 2013-08-12 14:47:50 +02:00
paramods.v
partsel.v Implemented indexed part selects 2013-11-20 13:05:27 +01:00
process.v
realexpr.v Fixed handling of mixed real/int ternary expressions 2014-06-25 10:05:36 +02:00
repwhile.v added tests for new verilog features 2014-06-07 12:26:11 +02:00
rotate.v Another name resolution bugfix for generate blocks 2013-11-20 13:57:40 +01:00
run-test.sh Added note to "make test": use git checkout of iverilog 2014-07-16 10:03:07 +02:00
signedexpr.v
sincos.v Fix in sincos testbench gen 2013-12-04 09:24:52 +01:00
subbytes.v
task_func.v
undef_eqx_nex.v Added proper === and !== support in constant expressions 2013-12-27 13:50:08 +01:00
usb_phy_tetsts.v
values.v Replaced RTLIL::Const::str with generic decoder method 2013-12-04 14:14:05 +01:00
vloghammer.v Behavior should be identical now to rev. 0b4a64ac6a (next: testing before constfold fixes) 2013-11-02 21:13:01 +01:00