yosys/techlibs/intel/max10 at fbd0d8d5f0c4d1dc1fc35371adc6d89efd2534cd - yosys - Gitea: Git with a cup of tea

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Marcelina Kościelnicka aee439360b Add force_downto and force_upto wire attributes.

Fixes #2058.

2020-05-19 01:42:40 +02:00

..

cells_arith.v

Add force_downto and force_upto wire attributes.

2020-05-19 01:42:40 +02:00

cells_map.v

Add force_downto and force_upto wire attributes.

2020-05-19 01:42:40 +02:00

cells_sim.v

Clean whitespace and permissions in techlibs/intel

2017-10-05 16:23:49 +02:00