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mirror of https://github.com/YosysHQ/yosys.git synced 2026-10-06 01:53:53 +02:00
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fa9df06c9dc5ead43645ba973e2ca8c63adfb29d
yosys/tests/arch
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Eddie Hung 38ee59184c tests: remove write_ilang
2020-04-20 15:42:29 -07:00
..
anlogic
Simplify breaking tests/arch/*/fsm.ys tests
2020-03-20 11:25:17 -07:00
common
ecp5: add support for both 1364.1 and LSE RAM/ROM attributes.
2020-02-06 16:52:51 +00:00
ecp5
tests: remove write_ilang
2020-04-20 15:42:29 -07:00
efinix
Simplify breaking tests/arch/*/fsm.ys tests
2020-03-20 11:25:17 -07:00
gowin
Add opt_lut_ins pass. (#1673)
2020-02-03 14:57:17 +01:00
ice40
tests: remove write_ilang
2020-04-20 15:42:29 -07:00
intel_alm
synth_intel_alm: alternative synthesis for Intel FPGAs
2020-04-15 11:40:41 +02:00
xilinx
fix argument order for macOS compatibility
2020-03-18 15:11:49 +01:00
run-test.sh
tests: extend tests/arch/run-tests.sh for defines
2020-03-05 08:08:32 -08:00
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