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mirror of https://github.com/YosysHQ/yosys.git synced 2026-10-07 02:23:09 +02:00
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f8a77abfac6da12e2e11c43b4e6aa6e613ac0d4b
yosys/passes/memory
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Clifford Wolf cad40fc874 Fixed bug in memory_share for memory ports with different ABITS
2016-08-22 14:26:33 +02:00
..
Makefile.inc
Added memory_memx pass, "memory -memx", and "prep -memx"
2016-08-19 19:48:26 +02:00
memory_bram.cc
Don't sign-extend memory bram initialization data
2016-05-15 00:05:30 +02:00
memory_collect.cc
Optimize memory address port width in wreduce and memory_collect, not verilog front-end
2016-08-19 18:38:25 +02:00
memory_dff.cc
Added "yosys -D" feature
2016-04-21 23:28:37 +02:00
memory_map.cc
Added "yosys -D" feature
2016-04-21 23:28:37 +02:00
memory_memx.cc
Added memory_memx pass, "memory -memx", and "prep -memx"
2016-08-19 19:48:26 +02:00
memory_share.cc
Fixed bug in memory_share for memory ports with different ABITS
2016-08-22 14:26:33 +02:00
memory_unpack.cc
Added "yosys -D" feature
2016-04-21 23:28:37 +02:00
memory.cc
Added memory_memx pass, "memory -memx", and "prep -memx"
2016-08-19 19:48:26 +02:00
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