yosys/tests
KrystalDelusion f7888c607b
Merge pull request #5089 from YosysHQ/krys/cutpoint_whole
cutpoint: Re-add whole module optimization
2025-05-16 09:22:28 +12:00
..
aiger read_aiger: Fix incorrect read of binary Aiger without outputs 2024-04-29 14:06:58 +01:00
alumacc macc_v2: Add test 2025-01-27 13:19:26 +01:00
arch URAM mapping : Add test for 2048 x 144b 2025-05-10 14:53:56 +02:00
asicworld
bind
blif
bram
cxxrtl Reinstate #4768 2025-04-08 11:58:05 +12:00
errors
fmt cxxrtl: always lazily format print messages. 2024-01-19 18:55:23 +00:00
fsm
functional functional tests: run from make tests but not smtlib/rkt tests 2024-09-04 10:30:08 +01:00
hana
liberty liberty: fix tests 2025-04-23 20:20:43 +00:00
lut
memfile
memlib Move parameters to module declaration 2024-04-08 12:44:37 +02:00
memories rtlil: Adjust internal check for `$mem_v2` cells 2024-11-08 15:18:43 +01:00
opt tests: test opt_expr constant shift edge cases 2025-04-26 12:40:04 +02:00
opt_share
peepopt Add `muldiv_c` peepopt pass 2025-04-30 08:06:59 -07:00
proc Merge pull request #4714 from georgerennie/george/proc_dff_bug_multiple_sigs 2024-11-20 13:26:32 +01:00
realmath
rpc Remove references to ilang 2024-11-05 12:36:31 +13:00
sat share: Cleanup and additional testing 2025-04-15 12:34:46 +02:00
select design.cc: Fix selections when copying 2025-04-08 16:35:12 +12:00
share
sim test: restore verific handling, nicer naming 2024-12-13 10:24:47 +01:00
simple write_verilog: don't `assign` to a `reg`. 2024-04-03 13:06:45 +02:00
simple_abc9 Reinstate #4768 2025-04-08 11:58:05 +12:00
smv Remove references to ilang 2024-11-05 12:36:31 +13:00
sva tests/sva: Skip sva tests that use SBY until SBY is compatible again 2024-03-05 14:37:33 +01:00
svinterfaces
svtypes test: restore verific handling, nicer naming 2024-12-13 10:24:47 +01:00
techmap Add check at constmap and merge test 2025-04-14 11:44:52 +01:00
tools
unit rtlil: Add {from,to}_hdl_index methods to Wire 2025-02-18 17:08:45 +01:00
various cutpoint: Re-add whole module optimization 2025-05-06 09:57:34 +12:00
verific Merge pull request #4814 from YosysHQ/emil/make-test-fasterer 2024-12-18 19:02:39 +01:00
verilog tests: Add default param test file 2025-05-05 10:18:52 +12:00
vloghtb
xprop tests: Comment on `A[0]` 2024-02-16 11:43:28 +01:00
gen-tests-makefile.sh Update gen-tests-makefile.sh 2025-03-27 10:33:51 +13:00