This website requires JavaScript.
Explore
Help
Sign In
luke
/
yosys
Watch
1
Star
0
Fork
0
mirror of
https://github.com/YosysHQ/yosys.git
synced
2026-09-02 11:07:41 +02:00
Code
Issues
Packages
Projects
Releases
Wiki
Activity
Files
f56dba8e2053d12fbd8e1e9b7dc83f3e4e340f3d
yosys
/
frontends
/
ast
T
History
Clifford Wolf
450f6f59b4
Fixed bug with memories that do not have a down-to-zero data width
2016-08-22 14:27:46 +02:00
..
ast.cc
Minor improvements to AstNode::dumpAst() and AstNode::dumpVlog()
2016-08-21 13:18:09 +02:00
ast.h
Another bugfix in mem2reg code
2016-08-21 13:23:58 +02:00
dpicall.cc
Fixed trailing whitespaces
2015-07-02 11:14:30 +02:00
genrtlil.cc
Another bugfix in mem2reg code
2016-08-21 13:23:58 +02:00
Makefile.inc
Added Verilog/AST support for DPI functions (dpi_call() still unimplemented)
2014-08-21 12:43:51 +02:00
simplify.cc
Fixed bug with memories that do not have a down-to-zero data width
2016-08-22 14:27:46 +02:00