Logo
Explore Help
Sign In
luke/yosys
Watch 1
Star 0
Fork 0
mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-03 03:13:21 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
f5013d035e5d0e6fd266280a50af4aa0e49110f2
yosys/docs/source
T
History
passingglance 2b89a5cced Update CHAPTER_Basics.rst
Fix typo in Fig. 2.2 caption.
2024-02-10 10:52:20 -08:00
..
appendix
Remove docs dependency on yosys repo (#3558)
2022-11-24 15:56:44 +01:00
APPNOTE_011_Design_Investigation
Remove docs dependency on yosys repo (#3558)
2022-11-24 15:56:44 +01:00
CHAPTER_Prog
Remove docs dependency on yosys repo (#3558)
2022-11-24 15:56:44 +01:00
bib.rst
…
CHAPTER_Approach.rst
…
CHAPTER_Basics.rst
Update CHAPTER_Basics.rst
2024-02-10 10:52:20 -08:00
CHAPTER_CellLib.rst
Add new $check cell to represent assertions with a message.
2024-02-01 20:10:39 +01:00
CHAPTER_Eval.rst
…
CHAPTER_Intro.rst
…
CHAPTER_Memorymap.rst
docs: reflow memory map
2023-06-19 12:05:51 +12:00
CHAPTER_Optimize.rst
…
CHAPTER_Overview.rst
…
CHAPTER_Prog.rst
Remove docs dependency on yosys repo (#3558)
2022-11-24 15:56:44 +01:00
CHAPTER_Techmap.rst
…
CHAPTER_Verilog.rst
…
cmd_ref.rst
…
conf.py
…
index.rst
Initial version of memory mapping doc
2023-05-26 09:36:01 +12:00
literature.bib
…
requirements.txt
…
Powered by Gitea Version: 1.27.2 Page: 8368ms Template: 10ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API