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mirror of https://github.com/YosysHQ/yosys.git synced 2026-10-06 18:13:40 +02:00
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f2f19df2d4387ae70f5b063f2bd6e7cbdaa1ce75
yosys/frontends
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whitequark 5c5881695d Merge pull request #1406 from whitequark/connect_rpc
rpc: new frontend
2019-09-30 17:38:20 +00:00
..
aiger
Merge pull request #1416 from YosysHQ/mmicko/frontend_binary_in
2019-09-30 17:49:23 +02:00
ast
Fix handling of read_verilog config in AstModule::reprocess_module(), fixes #1360
2019-09-20 12:16:20 +02:00
blif
Change signature of parse_blif to take IdString
2019-08-15 10:26:24 -07:00
ilang
Allow attributes on individual switch cases in RTLIL.
2019-07-08 11:34:58 +00:00
json
Update JSON front-end to process new attr/param encoding
2019-08-01 12:48:22 +02:00
liberty
stoi -> atoi
2019-08-07 11:09:17 -07:00
rpc
rpc: new frontend.
2019-09-30 15:53:11 +00:00
verific
Fix erroneous ifndef-NDEBUG in verific.cc
2019-08-17 14:49:55 +02:00
verilog
Fix handling of z_digit "?" and fix optimization of cmp with "z"
2019-09-13 13:39:39 +02:00
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