mirror of
https://github.com/YosysHQ/yosys.git
synced 2026-09-07 04:19:56 +02:00
On Minerva SoC SRAM, depending on the compiler, this change improves overall time by 4-7%.
On Minerva SoC SRAM, depending on the compiler, this change improves overall time by 4-7%.