Miodrag Milanovic fd41f9fa7c techlibs: ignore problematic block for verific, we anyway load as blackbox only

2026-09-30 15:57:44 +02:00

..

achronix

Register rest of targets

2026-09-30 13:01:55 +02:00

analogdevices

Register rest of targets

2026-09-30 13:01:55 +02:00

anlogic

Register rest of targets

2026-09-30 13:01:55 +02:00

common

Merge remote-tracking branch 'origin/main' into nella/latch-diagnostics-2

2026-09-22 16:49:41 +02:00

easic

Migrate build system to CMake

2026-06-03 08:58:10 +00:00

efinix

Register rest of targets

2026-09-30 13:01:55 +02:00

fabulous

Merge remote-tracking branch 'origin/main' into nella/latch-diagnostics-2

2026-09-22 16:49:41 +02:00

gatemate

Register rest of targets

2026-09-30 13:01:55 +02:00

gowin

Register rest of targets

2026-09-30 13:01:55 +02:00

ice40

register targets for lattice related synth passes

2026-09-30 10:53:41 +02:00

intel

Register rest of targets

2026-09-30 13:01:55 +02:00

intel_alm

Register rest of targets

2026-09-30 13:01:55 +02:00

lattice

register targets for lattice related synth passes

2026-09-30 10:53:41 +02:00

microchip

Register rest of targets

2026-09-30 13:01:55 +02:00

nanoxplore

Register rest of targets

2026-09-30 13:01:55 +02:00

quicklogic

Register rest of targets

2026-09-30 13:01:55 +02:00

sf2

Register rest of targets

2026-09-30 13:01:55 +02:00

xilinx

techlibs: ignore problematic block for verific, we anyway load as blackbox only

2026-09-30 15:57:44 +02:00

CMakeLists.txt

Merge pull request #6132 from YosysHQ/lofty/abc-refactor-12

2026-08-19 10:19:14 +00:00

fix_mod.py

Remove trailing whitespaces

2026-06-23 07:24:59 +02:00