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mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-29 17:38:17 +02:00
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e8e38308689a760b69bd2910a36701b19f64656d
yosys/techlibs
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Eddie Hung e8e3830868 Comment out SB_MAC16 arrival time for now, need to handle all its modes
2019-08-28 19:09:29 -07:00
..
achronix
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
anlogic
Fix missing newline at end of file
2019-08-22 18:09:37 +02:00
common
Missing newline
2019-08-20 20:37:52 -07:00
coolrunner2
Fix spacing
2019-08-06 16:47:55 -07:00
easic
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
ecp5
Merge remote-tracking branch 'origin/master' into xaig_arrival
2019-08-28 15:19:10 -07:00
efinix
Fix missing newline at end of file
2019-08-22 18:06:36 +02:00
gowin
Fix formatting for msys2 mingw build using GetSize
2019-08-01 17:27:34 +02:00
greenpak4
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
ice40
Comment out SB_MAC16 arrival time for now, need to handle all its modes
2019-08-28 19:09:29 -07:00
intel
techlibs/intel: Clean up Makefile
2019-08-05 11:22:11 -07:00
sf2
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
xilinx
Merge branch 'eddie/xilinx_srl' into xaig_arrival
2019-08-28 15:31:48 -07:00
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