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mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-29 17:38:17 +02:00
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e75e495c2bddb62634c6d50f90e09e0ff358faa5
yosys/kernel
T
History
Clifford Wolf e75e495c2b Added new RTLIL::Cell port access methods
2014-07-26 12:22:58 +02:00
..
bitpattern.h
Replaced more old SigChunk programming patterns
2014-07-24 23:10:58 +02:00
calc.cc
Strictly zero-extend unsigned A-inputs of shift operations
2014-03-06 11:53:37 +01:00
celltypes.h
Added support for dlatchsr cells
2014-03-31 14:14:40 +02:00
compatibility.cc
Merged OSX fixes from Siesh1oo with some modifications
2014-03-13 12:48:10 +01:00
compatibility.h
Hotfix for kernel/compatibility.h
2014-03-13 12:55:15 +01:00
consteval.h
Renamed RTLIL::{Module,Cell}::connections to connections_
2014-07-26 11:58:03 +02:00
driver.cc
Disabled cover() for non-linux builds
2014-07-25 12:27:36 +02:00
log.cc
Added cover_list() API
2014-07-24 20:47:18 +02:00
log.h
Disabled cover() for non-linux builds
2014-07-25 12:27:36 +02:00
modwalker.h
Renamed RTLIL::{Module,Cell}::connections to connections_
2014-07-26 11:58:03 +02:00
register.cc
Added "cover" command
2014-07-24 16:14:19 +02:00
register.h
Added "cover" command
2014-07-24 16:14:19 +02:00
rtlil.cc
Added new RTLIL::Cell port access methods
2014-07-26 12:22:58 +02:00
rtlil.h
Added new RTLIL::Cell port access methods
2014-07-26 12:22:58 +02:00
satgen.h
Renamed RTLIL::{Module,Cell}::connections to connections_
2014-07-26 11:58:03 +02:00
sigtools.h
Renamed RTLIL::{Module,Cell}::connections to connections_
2014-07-26 11:58:03 +02:00
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