Eddie Hung 727eec04c5 Refactor synth_xilinx to auto-generate doc		2019-04-26 14:32:18 -07:00
..
tests	…
.gitignore	…
Makefile.inc	…
arith_map.v	…
brams.txt	…
brams_bb.v	…
brams_init.py	…
brams_map.v	Revert BRAM WRITE_MODE changes.	2019-03-04 09:22:22 -08:00
cells_map.v	Call shregmap twice -- once for variable, another for fixed	2019-04-05 17:35:49 -07:00
cells_sim.v	Merge remote-tracking branch 'origin' into xc7srl	2019-04-20 10:41:43 -07:00
cells_xtra.sh	Merge remote-tracking branch 'origin' into xc7srl	2019-04-20 10:41:43 -07:00
cells_xtra.v	Merge remote-tracking branch 'origin' into xc7srl	2019-04-20 10:41:43 -07:00
drams.txt	…
drams_map.v	…
ff_map.v	Tidy up, fix for -nosrl	2019-04-21 15:33:03 -07:00
lut_map.v	…
synth_xilinx.cc	Refactor synth_xilinx to auto-generate doc	2019-04-26 14:32:18 -07:00